From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 153B91365 for ; Tue, 15 Feb 2022 07:25:26 +0000 (UTC) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 1F109315; Tue, 15 Feb 2022 08:25:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1644909925; bh=rX+ey5WeSDvMjiqbc0P60X6rJc5QWO0fTH8724NAYBg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cqEwBOeG0HKqloF68eUqggVi92BEwhbjayMLUrxNKM/VSuGIA8OS9FRTHrYnL4/pm /0OclVlcLfGYcCBC+qe2AlIR7u8eOtdjexJoTaGgH6p/EHJa3/2JQbZzgVjTT2J4TW 7svnwypIo8JLGU/tJDXjUXzpaBeepkjHiw1HBPEA= Date: Tue, 15 Feb 2022 09:25:18 +0200 From: Laurent Pinchart To: Jacopo Mondi Cc: slongerbeam@gmail.com, p.zabel@pengutronix.de, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, martin.kepplinger@puri.sm, rmfrfs@gmail.com, xavier.roumegue@oss.nxp.com, alexander.stein@ew.tq-group.com, dorota.czaplejewicz@puri.sm, kernel@pengutronix.de, linux-imx@nxp.com, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 6/8] media: imx: imx-mipi-csis: Set PIXEL_MODE for YUV422 Message-ID: References: <20220214184318.409208-1-jacopo@jmondi.org> <20220214184318.409208-7-jacopo@jmondi.org> Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20220214184318.409208-7-jacopo@jmondi.org> Hi Jacopo, Thank you for the patch. On Mon, Feb 14, 2022 at 07:43:16PM +0100, Jacopo Mondi wrote: > Bits 13 and 12 of the ISP_CONFIGn register configure the PIXEL_MODE > which specifies the sampling size, in pixel component units, on the > CSI-2 output data interface when data are transferred to memory. > > The register description in the chip manual specifies that DUAL mode > should be used for YUV422 data but does not clarify the reason. > > Verify if other YUV formats require the same setting and what is the > appropriate setting for RAW and sRGB formats. If it's an action item, shouldn't it be in a TODO comment in the code instead ? While it shouldn't be difficult to test this in RAW8 mode, I'd leave it for later, as I don't want to get into the rabbit hole of adding S[RGB]{4}8_0_5X16 or S[RGB]{4}10_0_5X20 formats now :-) > Signed-off-by: Jacopo Mondi > Signed-off-by: Xavier Roumegue > --- > drivers/media/platform/imx/imx-mipi-csis.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/media/platform/imx/imx-mipi-csis.c b/drivers/media/platform/imx/imx-mipi-csis.c > index f433758c8935..98a7538a6ce3 100644 > --- a/drivers/media/platform/imx/imx-mipi-csis.c > +++ b/drivers/media/platform/imx/imx-mipi-csis.c > @@ -173,6 +173,7 @@ > #define MIPI_CSIS_ISPCFG_PIXEL_MODE_SINGLE (0 << 12) > #define MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL (1 << 12) > #define MIPI_CSIS_ISPCFG_PIXEL_MODE_QUAD (2 << 12) /* i.MX8M[MNP] only */ > +#define MIPI_CSIS_ISPCFG_PIXEL_MASK (3 << 12) > #define MIPI_CSIS_ISPCFG_ALIGN_32BIT BIT(11) > #define MIPI_CSIS_ISPCFG_FMT(fmt) ((fmt) << 2) > #define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2) > @@ -506,7 +507,12 @@ static void __mipi_csis_set_format(struct csi_state *state) > > /* Color format */ > val = mipi_csis_read(state, MIPI_CSIS_ISP_CONFIG_CH(0)); > - val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK); > + val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK > + | MIPI_CSIS_ISPCFG_PIXEL_MASK); > + > + if (state->csis_fmt->data_type == MIPI_CSI2_DATA_TYPE_YUV422_8) > + val |= MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL; > + > val |= MIPI_CSIS_ISPCFG_FMT(state->csis_fmt->data_type); > mipi_csis_write(state, MIPI_CSIS_ISP_CONFIG_CH(0), val); > -- Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6B34C433F5 for ; Tue, 15 Feb 2022 07:26:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; 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Tue, 15 Feb 2022 07:25:28 +0000 Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 1F109315; Tue, 15 Feb 2022 08:25:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1644909925; bh=rX+ey5WeSDvMjiqbc0P60X6rJc5QWO0fTH8724NAYBg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cqEwBOeG0HKqloF68eUqggVi92BEwhbjayMLUrxNKM/VSuGIA8OS9FRTHrYnL4/pm /0OclVlcLfGYcCBC+qe2AlIR7u8eOtdjexJoTaGgH6p/EHJa3/2JQbZzgVjTT2J4TW 7svnwypIo8JLGU/tJDXjUXzpaBeepkjHiw1HBPEA= Date: Tue, 15 Feb 2022 09:25:18 +0200 From: Laurent Pinchart To: Jacopo Mondi Cc: slongerbeam@gmail.com, p.zabel@pengutronix.de, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, martin.kepplinger@puri.sm, rmfrfs@gmail.com, xavier.roumegue@oss.nxp.com, alexander.stein@ew.tq-group.com, dorota.czaplejewicz@puri.sm, kernel@pengutronix.de, linux-imx@nxp.com, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 6/8] media: imx: imx-mipi-csis: Set PIXEL_MODE for YUV422 Message-ID: References: <20220214184318.409208-1-jacopo@jmondi.org> <20220214184318.409208-7-jacopo@jmondi.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220214184318.409208-7-jacopo@jmondi.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220214_232527_004314_A97CC0C2 X-CRM114-Status: GOOD ( 21.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Jacopo, Thank you for the patch. On Mon, Feb 14, 2022 at 07:43:16PM +0100, Jacopo Mondi wrote: > Bits 13 and 12 of the ISP_CONFIGn register configure the PIXEL_MODE > which specifies the sampling size, in pixel component units, on the > CSI-2 output data interface when data are transferred to memory. > > The register description in the chip manual specifies that DUAL mode > should be used for YUV422 data but does not clarify the reason. > > Verify if other YUV formats require the same setting and what is the > appropriate setting for RAW and sRGB formats. If it's an action item, shouldn't it be in a TODO comment in the code instead ? While it shouldn't be difficult to test this in RAW8 mode, I'd leave it for later, as I don't want to get into the rabbit hole of adding S[RGB]{4}8_0_5X16 or S[RGB]{4}10_0_5X20 formats now :-) > Signed-off-by: Jacopo Mondi > Signed-off-by: Xavier Roumegue > --- > drivers/media/platform/imx/imx-mipi-csis.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/media/platform/imx/imx-mipi-csis.c b/drivers/media/platform/imx/imx-mipi-csis.c > index f433758c8935..98a7538a6ce3 100644 > --- a/drivers/media/platform/imx/imx-mipi-csis.c > +++ b/drivers/media/platform/imx/imx-mipi-csis.c > @@ -173,6 +173,7 @@ > #define MIPI_CSIS_ISPCFG_PIXEL_MODE_SINGLE (0 << 12) > #define MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL (1 << 12) > #define MIPI_CSIS_ISPCFG_PIXEL_MODE_QUAD (2 << 12) /* i.MX8M[MNP] only */ > +#define MIPI_CSIS_ISPCFG_PIXEL_MASK (3 << 12) > #define MIPI_CSIS_ISPCFG_ALIGN_32BIT BIT(11) > #define MIPI_CSIS_ISPCFG_FMT(fmt) ((fmt) << 2) > #define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2) > @@ -506,7 +507,12 @@ static void __mipi_csis_set_format(struct csi_state *state) > > /* Color format */ > val = mipi_csis_read(state, MIPI_CSIS_ISP_CONFIG_CH(0)); > - val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK); > + val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK > + | MIPI_CSIS_ISPCFG_PIXEL_MASK); > + > + if (state->csis_fmt->data_type == MIPI_CSI2_DATA_TYPE_YUV422_8) > + val |= MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL; > + > val |= MIPI_CSIS_ISPCFG_FMT(state->csis_fmt->data_type); > mipi_csis_write(state, MIPI_CSIS_ISP_CONFIG_CH(0), val); > -- Regards, Laurent Pinchart _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel