From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
Andy Shevchenko <andy@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH v1 4/4] pinctrl: icelake: Add Ice Lake-N PCH pin controller support
Date: Mon, 21 Feb 2022 17:28:56 +0200 [thread overview]
Message-ID: <YhOvuFwr2v15zY3u@lahna> (raw)
In-Reply-To: <20220215152800.21104-4-andriy.shevchenko@linux.intel.com>
On Tue, Feb 15, 2022 at 05:28:00PM +0200, Andy Shevchenko wrote:
> This adds pinctrl/GPIO support for Intel Ice Lake-N PCH. The Ice Lake-N
> PCH GPIO is based on the same version of the Intel GPIO hardware than
> Intel Cannon Lake with different set of pins and ACPI ID.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
next prev parent reply other threads:[~2022-02-21 15:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-15 15:27 [PATCH v1 1/4] pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID" Andy Shevchenko
2022-02-15 15:27 ` [PATCH v1 2/4] pinctrl: alderlake: Add Raptor Lake-S ACPI ID Andy Shevchenko
2022-02-21 15:24 ` Mika Westerberg
2022-02-15 15:27 ` [PATCH v1 3/4] pinctrl: alderlake: Add Intel Alder Lake-N pin controller support Andy Shevchenko
2022-02-21 15:28 ` Mika Westerberg
2022-02-15 15:28 ` [PATCH v1 4/4] pinctrl: icelake: Add Ice Lake-N PCH " Andy Shevchenko
2022-02-21 15:28 ` Mika Westerberg [this message]
2022-02-23 15:12 ` Andy Shevchenko
2022-02-15 16:44 ` [PATCH v1 1/4] pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID" Mika Westerberg
2022-02-15 17:07 ` Andy Shevchenko
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