From: Abel Vesa <abel.vesa@nxp.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: linux-clk@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Adrian Alonso <adrian.alonso@nxp.com>,
Mads Bligaard Nielsen <bli@bang-olufsen.dk>
Subject: Re: [PATCH 3/8] clk: imx: pll14xx: Use FIELD_GET/FIELD_PREP
Date: Wed, 23 Feb 2022 13:34:59 +0200 [thread overview]
Message-ID: <YhYb494fSUHIueic@abelvesa> (raw)
In-Reply-To: <20220223075601.3652543-4-s.hauer@pengutronix.de>
On 22-02-23 08:55:56, Sascha Hauer wrote:
> Linux has these marvelous FIELD_GET/FIELD_PREP macros for easy access
> to bitfields in registers. Use them and remove the now unused *_SHIFT
> defines.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> ---
> drivers/clk/imx/clk-pll14xx.c | 39 ++++++++++++++++-------------------
> 1 file changed, 18 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
> index b295d8a049009..3852a42b539e9 100644
> --- a/drivers/clk/imx/clk-pll14xx.c
> +++ b/drivers/clk/imx/clk-pll14xx.c
> @@ -22,13 +22,9 @@
> #define CLKE_MASK BIT(11)
> #define RST_MASK BIT(9)
> #define BYPASS_MASK BIT(4)
> -#define MDIV_SHIFT 12
> #define MDIV_MASK GENMASK(21, 12)
> -#define PDIV_SHIFT 4
> #define PDIV_MASK GENMASK(9, 4)
> -#define SDIV_SHIFT 0
> #define SDIV_MASK GENMASK(2, 0)
> -#define KDIV_SHIFT 0
> #define KDIV_MASK GENMASK(15, 0)
>
> #define LOCK_TIMEOUT_US 10000
> @@ -124,9 +120,9 @@ static unsigned long clk_pll1416x_recalc_rate(struct clk_hw *hw,
> u64 fvco = parent_rate;
>
> pll_div = readl_relaxed(pll->base + DIV_CTL0);
> - mdiv = (pll_div & MDIV_MASK) >> MDIV_SHIFT;
> - pdiv = (pll_div & PDIV_MASK) >> PDIV_SHIFT;
> - sdiv = (pll_div & SDIV_MASK) >> SDIV_SHIFT;
> + mdiv = FIELD_GET(MDIV_MASK, pll_div);
> + pdiv = FIELD_GET(PDIV_MASK, pll_div);
> + sdiv = FIELD_GET(SDIV_MASK, pll_div);
>
> fvco *= mdiv;
> do_div(fvco, pdiv << sdiv);
> @@ -144,10 +140,10 @@ static unsigned long clk_pll1443x_recalc_rate(struct clk_hw *hw,
>
> pll_div_ctl0 = readl_relaxed(pll->base + DIV_CTL0);
> pll_div_ctl1 = readl_relaxed(pll->base + DIV_CTL1);
> - mdiv = (pll_div_ctl0 & MDIV_MASK) >> MDIV_SHIFT;
> - pdiv = (pll_div_ctl0 & PDIV_MASK) >> PDIV_SHIFT;
> - sdiv = (pll_div_ctl0 & SDIV_MASK) >> SDIV_SHIFT;
> - kdiv = pll_div_ctl1 & KDIV_MASK;
> + mdiv = FIELD_GET(MDIV_MASK, pll_div_ctl0);
> + pdiv = FIELD_GET(PDIV_MASK, pll_div_ctl0);
> + sdiv = FIELD_GET(SDIV_MASK, pll_div_ctl0);
> + kdiv = FIELD_GET(KDIV_MASK, pll_div_ctl1);
>
> /* fvco = (m * 65536 + k) * Fin / (p * 65536) */
> fvco *= (mdiv * 65536 + kdiv);
> @@ -163,8 +159,8 @@ static inline bool clk_pll14xx_mp_change(const struct imx_pll14xx_rate_table *ra
> {
> u32 old_mdiv, old_pdiv;
>
> - old_mdiv = (pll_div & MDIV_MASK) >> MDIV_SHIFT;
> - old_pdiv = (pll_div & PDIV_MASK) >> PDIV_SHIFT;
> + old_mdiv = FIELD_GET(MDIV_MASK, pll_div);
> + old_pdiv = FIELD_GET(PDIV_MASK, pll_div);
>
> return rate->mdiv != old_mdiv || rate->pdiv != old_pdiv;
> }
> @@ -196,7 +192,7 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate,
>
> if (!clk_pll14xx_mp_change(rate, tmp)) {
> tmp &= ~SDIV_MASK;
> - tmp |= rate->sdiv << SDIV_SHIFT;
> + tmp |= FIELD_PREP(SDIV_MASK, rate->sdiv);
> writel_relaxed(tmp, pll->base + DIV_CTL0);
>
> return 0;
> @@ -215,8 +211,8 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate,
> tmp |= BYPASS_MASK;
> writel(tmp, pll->base + GNRL_CTL);
>
> - div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
> - (rate->sdiv << SDIV_SHIFT);
> + div_val = FIELD_PREP(MDIV_MASK, rate->mdiv) | FIELD_PREP(PDIV_MASK, rate->pdiv) |
> + FIELD_PREP(SDIV_MASK, rate->sdiv);
> writel_relaxed(div_val, pll->base + DIV_CTL0);
>
> /*
> @@ -262,10 +258,10 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate,
>
> if (!clk_pll14xx_mp_change(rate, tmp)) {
> tmp &= ~SDIV_MASK;
> - tmp |= rate->sdiv << SDIV_SHIFT;
> + tmp |= FIELD_PREP(SDIV_MASK, rate->sdiv);
> writel_relaxed(tmp, pll->base + DIV_CTL0);
>
> - tmp = rate->kdiv << KDIV_SHIFT;
> + tmp = FIELD_PREP(KDIV_MASK, rate->kdiv);
> writel_relaxed(tmp, pll->base + DIV_CTL1);
>
> return 0;
> @@ -280,10 +276,11 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate,
> tmp |= BYPASS_MASK;
> writel_relaxed(tmp, pll->base + GNRL_CTL);
>
> - div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
> - (rate->sdiv << SDIV_SHIFT);
> + div_val = FIELD_PREP(MDIV_MASK, rate->mdiv) |
> + FIELD_PREP(PDIV_MASK, rate->pdiv) |
> + FIELD_PREP(SDIV_MASK, rate->sdiv);
> writel_relaxed(div_val, pll->base + DIV_CTL0);
> - writel_relaxed(rate->kdiv << KDIV_SHIFT, pll->base + DIV_CTL1);
> + writel_relaxed(FIELD_PREP(KDIV_MASK, rate->kdiv), pll->base + DIV_CTL1);
>
> /*
> * According to SPEC, t3 - t2 need to be greater than
> --
> 2.30.2
>
next prev parent reply other threads:[~2022-02-23 11:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-23 7:55 [PATCH 0/8] clk: i.MX: PLL14xx: Support dynamic rates Sascha Hauer
2022-02-23 7:55 ` [PATCH 1/8] clk: imx: pll14xx: Use register defines consistently Sascha Hauer
2022-02-23 11:29 ` Abel Vesa
2022-02-23 7:55 ` [PATCH 2/8] clk: imx: pll14xx: Fix masking Sascha Hauer
2022-02-23 11:31 ` Abel Vesa
2022-02-23 11:46 ` Sascha Hauer
2022-02-23 7:55 ` [PATCH 3/8] clk: imx: pll14xx: Use FIELD_GET/FIELD_PREP Sascha Hauer
2022-02-23 11:34 ` Abel Vesa [this message]
2022-02-23 13:09 ` kernel test robot
2022-02-23 7:55 ` [PATCH 4/8] clk: imx: pll14xx: consolidate rate calculation Sascha Hauer
2022-02-23 7:55 ` [PATCH 5/8] clk: imx: pll14xx: name variables after usage Sascha Hauer
2022-02-23 7:55 ` [PATCH 6/8] clk: imx: pll14xx: explicitly return lowest rate Sascha Hauer
2022-02-23 7:56 ` [PATCH 7/8] clk: imx: pll14xx: Add pr_fmt Sascha Hauer
2022-02-23 12:47 ` kernel test robot
2022-02-23 7:56 ` [PATCH 8/8] clk: imx: pll14xx: Support dynamic rates Sascha Hauer
2022-02-23 12:48 ` kernel test robot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YhYb494fSUHIueic@abelvesa \
--to=abel.vesa@nxp.com \
--cc=adrian.alonso@nxp.com \
--cc=bli@bang-olufsen.dk \
--cc=festevam@gmail.com \
--cc=kernel@pengutronix.de \
--cc=linux-clk@vger.kernel.org \
--cc=linux-imx@nxp.com \
--cc=mturquette@baylibre.com \
--cc=s.hauer@pengutronix.de \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.