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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Mario Limonciello <mario.limonciello@amd.com>
Cc: "open list:THUNDERBOLT DRIVER" <linux-usb@vger.kernel.org>,
	linux-kernel@vger.kernel.org, Sanju.Mehta@amd.com
Subject: Re: [PATCH 4/5] drivers/thunderbolt: Clarify/correct register offsets for tb_cap_plug_events
Date: Thu, 3 Mar 2022 09:54:08 +0200	[thread overview]
Message-ID: <YiB0IFe96XIORdUz@lahna> (raw)
In-Reply-To: <20220302220709.3138846-4-mario.limonciello@amd.com>

On Wed, Mar 02, 2022 at 04:07:08PM -0600, Mario Limonciello wrote:
> The USB4 1.0 specification outlines the `cap_plug_events` structure in
> table 13-14 located on page 507.  This shows that there was a mistake
> in VSC_CS_1 where plug events disable should be 4 bits and
> "TBT3-Compatible" should be 3 bits.
> 
> While correcting the mistake, update the names and comments to more
> closely match the specification.  This should not change anything
> functionally.
> 
> Link: https://www.usb.org/sites/default/files/USB4%20Specification%2020211116.zip
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>  drivers/thunderbolt/tb_regs.h | 18 +++++++++++-------
>  1 file changed, 11 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
> index 70795a2aa9bb..8c42f8bc679e 100644
> --- a/drivers/thunderbolt/tb_regs.h
> +++ b/drivers/thunderbolt/tb_regs.h
> @@ -146,14 +146,14 @@ struct tb_eeprom_ctl {
>  
>  struct tb_cap_plug_events {
>  	struct tb_cap_extended_short cap_header;
> -	u32 __unknown1:2;
> -	u32 plug_events:5;
> -	u32 __unknown2:25;
> -	u32 __unknown3;
> -	u32 __unknown4;
> +	u32 __unknown1:3; /* VSC_CS_1 */
> +	u32 plug_events:4; /* VSC_CS_1 */
> +	u32 __unknown2:25; /* VSC_CS_1 */
> +	u32 vsc_cs_2;
> +	u32 vsc_cs_3;
>  	struct tb_eeprom_ctl eeprom_ctl;
> -	u32 __unknown5[7];
> -	u32 drom_offset; /* 32 bit register, but eeprom addresses are 16 bit */
> +	u32 __unknown5[7]; /* VSC_CS_5 -> VSC_CS_11 */
> +	u32 drom_offset; /* VSC_CS_12: 32 bit register, but eeprom addresses are 16 bit */
>  } __packed;
>  
>  /* device headers */
> @@ -464,6 +464,10 @@ struct tb_regs_hop {
>  
>  /* Plug Events registers */
>  #define TB_PLUG_EVENTS_USB_DISABLE		BIT(2)
> +#define USB4_PLUG_EVENTS_LANE_DISABLE		BIT(3)
> +#define USB4_PLUG_EVENTS_DPOUT_DISABLE		BIT(4)
> +#define USB4_PLUG_EVENTS_LOW_DPIN_DISABLE	BIT(5)
> +#define USB4_PLUG_EVENTS_HIGH_DPIN_DISABLE	BIT(6)

Since this is TBT3 "compatible" we should use TB_ prefix. What about:

TB_PLUG_EVENTS_CS_1_ ?

or 

TB_VSEC_3_CS_1_ ?

something that is easy to match with the register name in the USB4 spec.

  reply	other threads:[~2022-03-03  7:54 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-02 22:07 [PATCH 1/5] drivers/thunderbolt: Retry DROM reads for more failure scenarios Mario Limonciello
2022-03-02 22:07 ` [PATCH 2/5] drivers/thunderbolt: don't resume switches without uid set Mario Limonciello
2022-03-03  7:43   ` Mika Westerberg
2022-03-02 22:07 ` [PATCH 3/5] drivers/thunderbolt: Don't make DROM read success compulsory Mario Limonciello
2022-03-03  7:47   ` Mika Westerberg
2022-03-02 22:07 ` [PATCH 4/5] drivers/thunderbolt: Clarify/correct register offsets for tb_cap_plug_events Mario Limonciello
2022-03-03  7:54   ` Mika Westerberg [this message]
2022-03-02 22:07 ` [PATCH 5/5] drivers/thunderbolt: Rename EEPROM handling bits to match USB4 spec Mario Limonciello

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