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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="jeRcZFfk5DO+poSG" Content-Disposition: inline In-Reply-To: <3055b4a5-2d55-9cf1-1069-8c57208bf0af@xen.org> --jeRcZFfk5DO+poSG Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 10 Mar 2022 17:37:49 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Julien Grall Cc: Roger Pau =?utf-8?B?TW9ubsOp?= , Jan Beulich , Andrew Cooper , George Dunlap , Stefano Stabellini , Wei Liu , xen-devel@lists.xenproject.org Subject: Re: [PATCH 1/2] ns16550: reject IRQ above nr_irqs On Thu, Mar 10, 2022 at 04:21:50PM +0000, Julien Grall wrote: > Hi, >=20 > On 10/03/2022 16:12, Roger Pau Monn=C3=A9 wrote: > > On Thu, Mar 10, 2022 at 05:08:07PM +0100, Jan Beulich wrote: > > > On 10.03.2022 16:47, Roger Pau Monn=C3=A9 wrote: > > > > On Thu, Mar 10, 2022 at 04:23:00PM +0100, Jan Beulich wrote: > > > > > On 10.03.2022 15:34, Marek Marczykowski-G=C3=B3recki wrote: > > > > > > --- a/xen/drivers/char/ns16550.c > > > > > > +++ b/xen/drivers/char/ns16550.c > > > > > > @@ -1221,6 +1221,9 @@ pci_uart_config(struct ns16550 *uart, boo= l_t skip_amt, unsigned int idx) > > > > > > pci_conf_read8(PCI_SBDF(0, b, d, = f), > > > > > > PCI_INTERRUPT_LINE= ) : 0; > > > > > > + if (uart->irq >=3D nr_irqs) > > > > > > + uart->irq =3D 0; > > > > >=20 > > > > > Don't you mean nr_irqs_gsi here? Also (nit) please add the missin= g blanks > > > > > immediately inside the parentheses. > > > >=20 > > > > If we use nr_irqs_gsi we will need to make the check x86 only AFAIC= T. > > >=20 > > > Down the road (when Arm wants to select HAS_PCI) - yes. Not necessari= ly > > > right away. After all Arm wants to have an equivalent check here then, > > > not merely checking against nr_irqs instead. So putting a conditional > > > here right away would hide the need for putting in place an Arm-speci= fic > > > alternative. > >=20 > > Oh, I always forget Arm doesn't have CONFIG_HAS_PCI enabled just yet. > The PCI code in ns16550.c is gated by CONFIG_HAS_PCI and CONFIG_X86. I am > not sure we will ever see a support for PCI UART card in Xen on Arm. >=20 > However, if it evers happens then neither nr_irqs or nr_irqs_gsi would he= lp > here because from the interrupt controller PoV 0xff may be a valid (GICv2 > supports up to 1024 interrupts). >=20 > Is there any reason we can't explicitely check 0xff? That's what my v0.1 did, but Roger suggested nr_irqs. And I agree, because the value is later used (on x86) to access irq_desc array (via irq_to_desc), which has nr_irqs size. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --jeRcZFfk5DO+poSG Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmIqKV0ACgkQ24/THMrX 1yxgCwf/ffMj252XwXfMM00gL4pJ2pZmjsPdgrjwEIEX+/B9sEQVFF/+vAl4RY0x rvodcPHWjg86JFfQadqKDlMTseo8RWNjCbjjR+jYjmyf8L9Hi1ZwOLqFgX0TG8LT Dhe95Ba9bsh1aQ272Iw72nnqEOUKXMral7gCgp/m/cFTrtM8xwIkyWCMTNw0h58B ulyumOAG0SAcHlbLFnOmbT5byscxqf5B2u1i3Lo/P8lrBODzKPNDK7f4IUegWmUY NVfaI518vHbU5xxnS9FmiYmVnga0LlORG36Uu66AWtrw+0iK1AJJl0cPfCV/F31T UQS7d0gCO+L2kOV3VCj1Y0b4qv9qEg== =dTro -----END PGP SIGNATURE----- --jeRcZFfk5DO+poSG--