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charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR04MB7158.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 45265ec8-e5fc-4eaf-41cb-08da0376fe7d X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Mar 2022 15:51:23.5275 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: OGqsJDll8o+Eh9NsIyHFpex/VXybvwr9DjCHPqYCxwbCDfiCazCRbx3e1YTsGbLrbSg1+CYglYyPXoLET5dFrQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR04MB1047 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org On Fri, Mar 11, 2022 at 05:25:50PM +0300, Serge Semin wrote: > Hello Niklas Hello Serge, >=20 > On Tue, Mar 01, 2022 at 11:17:20AM +0000, Niklas Cassel wrote: > > From: Niklas Cassel > >=20 > > Simply deasserting reset just ensures that the hardware is taken out of > > reset, if it was booted with the hardware reset asserted. > >=20 > > In order actually reset the SPI controller, we need to assert reset bef= ore > > deasserting. > >=20 > > By doing this, we ensure that the hardware is not in some bad state, an= d we > > ensure that the hardware registers get set to their reset default, clea= ring > > any setting set by e.g. a bootloader. > >=20 > > Signed-off-by: Niklas Cassel > > --- > > drivers/spi/spi-dw-mmio.c | 2 ++ > > 1 file changed, 2 insertions(+) > >=20 > > diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c > > index 5101c4c6017b..eb1dacb45ca2 100644 > > --- a/drivers/spi/spi-dw-mmio.c > > +++ b/drivers/spi/spi-dw-mmio.c > > @@ -289,6 +289,8 @@ static int dw_spi_mmio_probe(struct platform_device= *pdev) > > ret =3D PTR_ERR(dwsmmio->rstc); > > goto out_clk; > > } >=20 > > + reset_control_assert(dwsmmio->rstc); > > + udelay(2); >=20 > Do we really need this? dw_spi_add_host() is doing a sort of soft reset > anyway by calling the dw_spi_hw_init() method. Do you have a real > platform, which requires to do a full hard-reset? Does this solve a real problem that I've seen with the SPI controller? No. Which register write in dw_spi_hw_init() is doing a soft reset? I assume that you mean one of the writes in dw_spi_reset_chip(), probably DW_SPI_SSIENR. I don't think us toggling this register will reset all registers to their reset default values. I think it is a good to start off with all registers in their default reset values. Arguably, I think it looks wrong to see a reset_control_deassert() without any previous reset_control_assert(). Do a simple: git grep -C 10 reset_control_deassert drivers/spi/ And you see that most SPI drivers (and most other device drivers for that matter), usually assert reset before deasserting it, in order to ensure that a reset pulse is actually sent to the hardware. Simply deasserting reset, will have the hardware in a "fresh" state if it was a cold boot (where reset is usually asserted until deasserted), but will not have the hardware in a "fresh" state if booted via a boot loader. This is an inconsistency, and could potentially lead to issues that are only noticed if booting via a bootloader. >=20 > What about the self-reset based controllers? Not sure what specific feature in the SPI controller you are referring to. Kind regards, Niklas=