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Tue, 15 Mar 2022 09:45:41 -0700 (PDT) Received: from builder.lan ([2600:1700:a0:3dc8:3697:f6ff:fe85:aac9]) by smtp.gmail.com with ESMTPSA id j1-20020a4aea41000000b002e140d2d96esm9323311ooe.13.2022.03.15.09.45.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Mar 2022 09:45:41 -0700 (PDT) Date: Tue, 15 Mar 2022 11:45:39 -0500 From: Bjorn Andersson To: Srinivasa Rao Mandadapu Subject: Re: [PATCH v11 4/7] pinctrl: qcom: Update lpi pin group custiom functions with framework generic functions Message-ID: References: <1647359413-31662-1-git-send-email-quic_srivasam@quicinc.com> <1647359413-31662-5-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1647359413-31662-5-git-send-email-quic_srivasam@quicinc.com> Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, bgoswami@codeaurora.org, Venkata Prasad Potturu , linux-arm-msm@vger.kernel.org, swboyd@chromium.org, tiwai@suse.com, agross@kernel.org, robh+dt@kernel.org, lgirdwood@gmail.com, linux-gpio@vger.kernel.org, rohitkr@codeaurora.org, broonie@kernel.org, srinivas.kandagatla@linaro.org, quic_plai@quicinc.com, judyhsiao@chromium.org, Linus Walleij , linux-kernel@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Tue 15 Mar 10:50 CDT 2022, Srinivasa Rao Mandadapu wrote: > Update custom pin group structure members with framework generic group_desc structure > and replace the driver's custom pinctrl_ops with framework provided generic pin control > group functions to avoid redundant code written in lpass lpi driver. > > Signed-off-by: Srinivasa Rao Mandadapu > Co-developed-by: Venkata Prasad Potturu > Signed-off-by: Venkata Prasad Potturu > --- > drivers/pinctrl/qcom/Kconfig | 1 + > drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 98 +++++++++++++++----------------- > 2 files changed, 48 insertions(+), 51 deletions(-) > > diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig > index ca6f68a..31c4aa6 100644 > --- a/drivers/pinctrl/qcom/Kconfig > +++ b/drivers/pinctrl/qcom/Kconfig > @@ -351,6 +351,7 @@ config PINCTRL_LPASS_LPI > select PINMUX > select PINCONF > select GENERIC_PINCONF > + select GENERIC_PINCTRL_GROUPS > depends on GPIOLIB > help > This is the pinctrl, pinmux, pinconf and gpiolib driver for the > diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > index 3c15f80..5e27a38 100644 > --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > @@ -51,11 +51,11 @@ > > #define LPI_PINGROUP(id, soff, f1, f2, f3, f4) \ > { \ > - .name = "gpio" #id, \ > - .pins = gpio##id##_pins, \ > + .group.name = "gpio" #id, \ > + .group.pins = gpio##id##_pins, \ > .pin = id, \ > .slew_offset = soff, \ > - .npins = ARRAY_SIZE(gpio##id##_pins), \ > + .group.num_pins = ARRAY_SIZE(gpio##id##_pins), \ > .funcs = (int[]){ \ > LPI_MUX_gpio, \ > LPI_MUX_##f1, \ > @@ -67,9 +67,7 @@ > } > > struct lpi_pingroup { > - const char *name; > - const unsigned int *pins; > - unsigned int npins; > + struct group_desc group; > unsigned int pin; > /* Bit offset in slew register for SoundWire pins only */ > int slew_offset; > @@ -150,20 +148,20 @@ enum sm8250_lpi_functions { > LPI_MUX__, > }; > > -static const unsigned int gpio0_pins[] = { 0 }; > -static const unsigned int gpio1_pins[] = { 1 }; > -static const unsigned int gpio2_pins[] = { 2 }; > -static const unsigned int gpio3_pins[] = { 3 }; > -static const unsigned int gpio4_pins[] = { 4 }; > -static const unsigned int gpio5_pins[] = { 5 }; > -static const unsigned int gpio6_pins[] = { 6 }; > -static const unsigned int gpio7_pins[] = { 7 }; > -static const unsigned int gpio8_pins[] = { 8 }; > -static const unsigned int gpio9_pins[] = { 9 }; > -static const unsigned int gpio10_pins[] = { 10 }; > -static const unsigned int gpio11_pins[] = { 11 }; > -static const unsigned int gpio12_pins[] = { 12 }; > -static const unsigned int gpio13_pins[] = { 13 }; > +static int gpio0_pins[] = { 0 }; > +static int gpio1_pins[] = { 1 }; > +static int gpio2_pins[] = { 2 }; > +static int gpio3_pins[] = { 3 }; > +static int gpio4_pins[] = { 4 }; > +static int gpio5_pins[] = { 5 }; > +static int gpio6_pins[] = { 6 }; > +static int gpio7_pins[] = { 7 }; > +static int gpio8_pins[] = { 8 }; > +static int gpio9_pins[] = { 9 }; > +static int gpio10_pins[] = { 10 }; > +static int gpio11_pins[] = { 11 }; > +static int gpio12_pins[] = { 12 }; > +static int gpio13_pins[] = { 13 }; > static const char * const swr_tx_clk_groups[] = { "gpio0" }; > static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio5" }; > static const char * const swr_rx_clk_groups[] = { "gpio3" }; > @@ -250,38 +248,10 @@ static int lpi_gpio_write(struct lpi_pinctrl *state, unsigned int pin, > return 0; > } > > -static int lpi_gpio_get_groups_count(struct pinctrl_dev *pctldev) > -{ > - struct lpi_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); > - > - return pctrl->data->ngroups; > -} > - > -static const char *lpi_gpio_get_group_name(struct pinctrl_dev *pctldev, > - unsigned int group) > -{ > - struct lpi_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); > - > - return pctrl->data->groups[group].name; > -} > - > -static int lpi_gpio_get_group_pins(struct pinctrl_dev *pctldev, > - unsigned int group, > - const unsigned int **pins, > - unsigned int *num_pins) > -{ > - struct lpi_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); > - > - *pins = pctrl->data->groups[group].pins; > - *num_pins = pctrl->data->groups[group].npins; > - > - return 0; > -} > - > static const struct pinctrl_ops lpi_gpio_pinctrl_ops = { > - .get_groups_count = lpi_gpio_get_groups_count, > - .get_group_name = lpi_gpio_get_group_name, > - .get_group_pins = lpi_gpio_get_group_pins, > + .get_groups_count = pinctrl_generic_get_group_count, > + .get_group_name = pinctrl_generic_get_group_name, > + .get_group_pins = pinctrl_generic_get_group_pins, > .dt_node_to_map = pinconf_generic_dt_node_to_map_group, > .dt_free_map = pinctrl_utils_free_map, > }; > @@ -582,6 +552,28 @@ static const struct gpio_chip lpi_gpio_template = { > .dbg_show = lpi_gpio_dbg_show, > }; > > +static int lpi_build_pin_desc_groups(struct lpi_pinctrl *pctrl) > +{ > + struct group_desc *lpi_groups; > + int i; > + > + lpi_groups = devm_kcalloc(pctrl->dev, pctrl->data->npins, > + sizeof(*lpi_groups), GFP_KERNEL); > + if (!lpi_groups) > + return -ENOMEM; > + > + for (i = 0; i < pctrl->data->npins; i++) { > + const struct pinctrl_pin_desc *pin_info = pctrl->desc.pins + i; > + struct group_desc *group = lpi_groups + i; > + > + group->name = pin_info->name; > + group->pins = (int *)&pin_info->number; > + pinctrl_generic_add_group(pctrl->ctrl, group->name, group->pins, 1, NULL); I've not used this generic interface before, but I believe you need to pair your add with pinctrl_generic_remove_group(), both in error paths and driver remove. Makes me wonder about the usefulness of this, as you will end up with a bit more code than you remove and you have the additional heap allocation. Feels like I'm missing something... > + } > + > + return 0; > +} > + > static int lpi_pinctrl_probe(struct platform_device *pdev) > { > const struct lpi_pinctrl_variant_data *data; > @@ -647,6 +639,10 @@ static int lpi_pinctrl_probe(struct platform_device *pdev) > goto err_pinctrl; > } > > + ret = lpi_build_pin_desc_groups(pctrl); > + if (ret) > + return ret; A few lines up the code does error handling by goto err_pinctrl, you should do the same. Regards, Bjorn > + > ret = devm_gpiochip_add_data(dev, &pctrl->chip, pctrl); > if (ret) { > dev_err(pctrl->dev, "can't add gpio chip\n"); > -- > 2.7.4 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08FC4C433EF for ; Tue, 15 Mar 2022 16:45:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350044AbiCOQq4 (ORCPT ); Tue, 15 Mar 2022 12:46:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50656 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345270AbiCOQq4 (ORCPT ); Tue, 15 Mar 2022 12:46:56 -0400 Received: from mail-oi1-x234.google.com (mail-oi1-x234.google.com [IPv6:2607:f8b0:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5875557494 for ; Tue, 15 Mar 2022 09:45:42 -0700 (PDT) Received: by mail-oi1-x234.google.com with SMTP id w127so21404695oig.10 for ; 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Tue, 15 Mar 2022 09:45:41 -0700 (PDT) Received: from builder.lan ([2600:1700:a0:3dc8:3697:f6ff:fe85:aac9]) by smtp.gmail.com with ESMTPSA id j1-20020a4aea41000000b002e140d2d96esm9323311ooe.13.2022.03.15.09.45.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Mar 2022 09:45:41 -0700 (PDT) Date: Tue, 15 Mar 2022 11:45:39 -0500 From: Bjorn Andersson To: Srinivasa Rao Mandadapu Cc: agross@kernel.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, quic_plai@quicinc.com, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org, Linus Walleij , linux-gpio@vger.kernel.org, Venkata Prasad Potturu Subject: Re: [PATCH v11 4/7] pinctrl: qcom: Update lpi pin group custiom functions with framework generic functions Message-ID: References: <1647359413-31662-1-git-send-email-quic_srivasam@quicinc.com> <1647359413-31662-5-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1647359413-31662-5-git-send-email-quic_srivasam@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue 15 Mar 10:50 CDT 2022, Srinivasa Rao Mandadapu wrote: > Update custom pin group structure members with framework generic group_desc structure > and replace the driver's custom pinctrl_ops with framework provided generic pin control > group functions to avoid redundant code written in lpass lpi driver. > > Signed-off-by: Srinivasa Rao Mandadapu > Co-developed-by: Venkata Prasad Potturu > Signed-off-by: Venkata Prasad Potturu > --- > drivers/pinctrl/qcom/Kconfig | 1 + > drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 98 +++++++++++++++----------------- > 2 files changed, 48 insertions(+), 51 deletions(-) > > diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig > index ca6f68a..31c4aa6 100644 > --- a/drivers/pinctrl/qcom/Kconfig > +++ b/drivers/pinctrl/qcom/Kconfig > @@ -351,6 +351,7 @@ config PINCTRL_LPASS_LPI > select PINMUX > select PINCONF > select GENERIC_PINCONF > + select GENERIC_PINCTRL_GROUPS > depends on GPIOLIB > help > This is the pinctrl, pinmux, pinconf and gpiolib driver for the > diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > index 3c15f80..5e27a38 100644 > --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > @@ -51,11 +51,11 @@ > > #define LPI_PINGROUP(id, soff, f1, f2, f3, f4) \ > { \ > - .name = "gpio" #id, \ > - .pins = gpio##id##_pins, \ > + .group.name = "gpio" #id, \ > + .group.pins = gpio##id##_pins, \ > .pin = id, \ > .slew_offset = soff, \ > - .npins = ARRAY_SIZE(gpio##id##_pins), \ > + .group.num_pins = ARRAY_SIZE(gpio##id##_pins), \ > .funcs = (int[]){ \ > LPI_MUX_gpio, \ > LPI_MUX_##f1, \ > @@ -67,9 +67,7 @@ > } > > struct lpi_pingroup { > - const char *name; > - const unsigned int *pins; > - unsigned int npins; > + struct group_desc group; > unsigned int pin; > /* Bit offset in slew register for SoundWire pins only */ > int slew_offset; > @@ -150,20 +148,20 @@ enum sm8250_lpi_functions { > LPI_MUX__, > }; > > -static const unsigned int gpio0_pins[] = { 0 }; > -static const unsigned int gpio1_pins[] = { 1 }; > -static const unsigned int gpio2_pins[] = { 2 }; > -static const unsigned int gpio3_pins[] = { 3 }; > -static const unsigned int gpio4_pins[] = { 4 }; > -static const unsigned int gpio5_pins[] = { 5 }; > -static const unsigned int gpio6_pins[] = { 6 }; > -static const unsigned int gpio7_pins[] = { 7 }; > -static const unsigned int gpio8_pins[] = { 8 }; > -static const unsigned int gpio9_pins[] = { 9 }; > -static const unsigned int gpio10_pins[] = { 10 }; > -static const unsigned int gpio11_pins[] = { 11 }; > -static const unsigned int gpio12_pins[] = { 12 }; > -static const unsigned int gpio13_pins[] = { 13 }; > +static int gpio0_pins[] = { 0 }; > +static int gpio1_pins[] = { 1 }; > +static int gpio2_pins[] = { 2 }; > +static int gpio3_pins[] = { 3 }; > +static int gpio4_pins[] = { 4 }; > +static int gpio5_pins[] = { 5 }; > +static int gpio6_pins[] = { 6 }; > +static int gpio7_pins[] = { 7 }; > +static int gpio8_pins[] = { 8 }; > +static int gpio9_pins[] = { 9 }; > +static int gpio10_pins[] = { 10 }; > +static int gpio11_pins[] = { 11 }; > +static int gpio12_pins[] = { 12 }; > +static int gpio13_pins[] = { 13 }; > static const char * const swr_tx_clk_groups[] = { "gpio0" }; > static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio5" }; > static const char * const swr_rx_clk_groups[] = { "gpio3" }; > @@ -250,38 +248,10 @@ static int lpi_gpio_write(struct lpi_pinctrl *state, unsigned int pin, > return 0; > } > > -static int lpi_gpio_get_groups_count(struct pinctrl_dev *pctldev) > -{ > - struct lpi_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); > - > - return pctrl->data->ngroups; > -} > - > -static const char *lpi_gpio_get_group_name(struct pinctrl_dev *pctldev, > - unsigned int group) > -{ > - struct lpi_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); > - > - return pctrl->data->groups[group].name; > -} > - > -static int lpi_gpio_get_group_pins(struct pinctrl_dev *pctldev, > - unsigned int group, > - const unsigned int **pins, > - unsigned int *num_pins) > -{ > - struct lpi_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); > - > - *pins = pctrl->data->groups[group].pins; > - *num_pins = pctrl->data->groups[group].npins; > - > - return 0; > -} > - > static const struct pinctrl_ops lpi_gpio_pinctrl_ops = { > - .get_groups_count = lpi_gpio_get_groups_count, > - .get_group_name = lpi_gpio_get_group_name, > - .get_group_pins = lpi_gpio_get_group_pins, > + .get_groups_count = pinctrl_generic_get_group_count, > + .get_group_name = pinctrl_generic_get_group_name, > + .get_group_pins = pinctrl_generic_get_group_pins, > .dt_node_to_map = pinconf_generic_dt_node_to_map_group, > .dt_free_map = pinctrl_utils_free_map, > }; > @@ -582,6 +552,28 @@ static const struct gpio_chip lpi_gpio_template = { > .dbg_show = lpi_gpio_dbg_show, > }; > > +static int lpi_build_pin_desc_groups(struct lpi_pinctrl *pctrl) > +{ > + struct group_desc *lpi_groups; > + int i; > + > + lpi_groups = devm_kcalloc(pctrl->dev, pctrl->data->npins, > + sizeof(*lpi_groups), GFP_KERNEL); > + if (!lpi_groups) > + return -ENOMEM; > + > + for (i = 0; i < pctrl->data->npins; i++) { > + const struct pinctrl_pin_desc *pin_info = pctrl->desc.pins + i; > + struct group_desc *group = lpi_groups + i; > + > + group->name = pin_info->name; > + group->pins = (int *)&pin_info->number; > + pinctrl_generic_add_group(pctrl->ctrl, group->name, group->pins, 1, NULL); I've not used this generic interface before, but I believe you need to pair your add with pinctrl_generic_remove_group(), both in error paths and driver remove. Makes me wonder about the usefulness of this, as you will end up with a bit more code than you remove and you have the additional heap allocation. Feels like I'm missing something... > + } > + > + return 0; > +} > + > static int lpi_pinctrl_probe(struct platform_device *pdev) > { > const struct lpi_pinctrl_variant_data *data; > @@ -647,6 +639,10 @@ static int lpi_pinctrl_probe(struct platform_device *pdev) > goto err_pinctrl; > } > > + ret = lpi_build_pin_desc_groups(pctrl); > + if (ret) > + return ret; A few lines up the code does error handling by goto err_pinctrl, you should do the same. Regards, Bjorn > + > ret = devm_gpiochip_add_data(dev, &pctrl->chip, pctrl); > if (ret) { > dev_err(pctrl->dev, "can't add gpio chip\n"); > -- > 2.7.4 >