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Tue, 15 Mar 2022 09:57:23 -0700 (PDT) Received: from builder.lan ([2600:1700:a0:3dc8:3697:f6ff:fe85:aac9]) by smtp.gmail.com with ESMTPSA id l12-20020a056808020c00b002da28c240dfsm9665261oie.16.2022.03.15.09.57.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Mar 2022 09:57:22 -0700 (PDT) Date: Tue, 15 Mar 2022 11:57:20 -0500 From: Bjorn Andersson To: Srinivasa Rao Mandadapu Subject: Re: [PATCH v11 7/7] pinctrl: qcom: Update clock voting as optional Message-ID: References: <1647359413-31662-1-git-send-email-quic_srivasam@quicinc.com> <1647359413-31662-8-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1647359413-31662-8-git-send-email-quic_srivasam@quicinc.com> Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, bgoswami@codeaurora.org, Venkata Prasad Potturu , linux-arm-msm@vger.kernel.org, swboyd@chromium.org, tiwai@suse.com, agross@kernel.org, robh+dt@kernel.org, lgirdwood@gmail.com, linux-gpio@vger.kernel.org, rohitkr@codeaurora.org, broonie@kernel.org, srinivas.kandagatla@linaro.org, quic_plai@quicinc.com, judyhsiao@chromium.org, Linus Walleij , linux-kernel@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Tue 15 Mar 10:50 CDT 2022, Srinivasa Rao Mandadapu wrote: > Update bulk clock voting to optional voting as ADSP bypass platform doesn't > need macro and decodec clocks, as these macro and dcodec GDSC switches are > maintained as power domains and operated from lpass clock drivers. > Sorry for missing your reply on my question on the previous version, I think this sounds reasonable. > Signed-off-by: Srinivasa Rao Mandadapu > Co-developed-by: Venkata Prasad Potturu > Signed-off-by: Venkata Prasad Potturu > --- > drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 12 +++++++++--- > drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 1 + > drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 1 + > 3 files changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > index 0216ca1..3fc473a 100644 > --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > @@ -401,9 +401,15 @@ int lpi_pinctrl_probe(struct platform_device *pdev) > return dev_err_probe(dev, PTR_ERR(pctrl->slew_base), > "Slew resource not provided\n"); > > - ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks); > - if (ret) > - return dev_err_probe(dev, ret, "Can't get clocks\n"); > + if (data->is_clk_optional) { > + ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks); > + if (ret) > + return dev_err_probe(dev, ret, "Can't get clocks\n"); Dug into the clk_bulk_get() functions, and __clk_bulk_get() will print an error telling you which clock it failed to get. So I don't think your more generic error here doesn't add any value. Just return ret; > + } else { > + ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks); > + if (ret) > + return dev_err_probe(dev, ret, "Can't get clocks\n"); > + } Depending on your taste, you could do: if (data->is_clk_optional) ret = devm_clk_bulk_get_optional(); else ret = devm_clk_bulk_get(); if (ret) return ret; > > ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks); > if (ret) > diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h > index afbac2a..3bcede6 100644 > --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h > +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h > @@ -77,6 +77,7 @@ struct lpi_pinctrl_variant_data { > int ngroups; > const struct lpi_function *functions; > int nfunctions; > + int is_clk_optional; bool here please. > }; > > int lpi_pinctrl_probe(struct platform_device *pdev); > diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c > index d67ff25..304d8a2 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c > +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c > @@ -142,6 +142,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = { > .ngroups = ARRAY_SIZE(sc7280_groups), > .functions = sc7280_functions, > .nfunctions = ARRAY_SIZE(sc7280_functions), > + .is_clk_optional = 1, true Regards, Bjorn > }; > > static const struct of_device_id lpi_pinctrl_of_match[] = { > -- > 2.7.4 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4381C4332F for ; Tue, 15 Mar 2022 16:57:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350350AbiCOQ6h (ORCPT ); Tue, 15 Mar 2022 12:58:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350346AbiCOQ6g (ORCPT ); Tue, 15 Mar 2022 12:58:36 -0400 Received: from mail-oo1-xc31.google.com (mail-oo1-xc31.google.com [IPv6:2607:f8b0:4864:20::c31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 22B7857481 for ; Tue, 15 Mar 2022 09:57:24 -0700 (PDT) Received: by mail-oo1-xc31.google.com with SMTP id k13-20020a4a948d000000b003172f2f6bdfso25084682ooi.1 for ; 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Tue, 15 Mar 2022 09:57:23 -0700 (PDT) Received: from builder.lan ([2600:1700:a0:3dc8:3697:f6ff:fe85:aac9]) by smtp.gmail.com with ESMTPSA id l12-20020a056808020c00b002da28c240dfsm9665261oie.16.2022.03.15.09.57.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Mar 2022 09:57:22 -0700 (PDT) Date: Tue, 15 Mar 2022 11:57:20 -0500 From: Bjorn Andersson To: Srinivasa Rao Mandadapu Cc: agross@kernel.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, quic_plai@quicinc.com, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org, Linus Walleij , linux-gpio@vger.kernel.org, Venkata Prasad Potturu Subject: Re: [PATCH v11 7/7] pinctrl: qcom: Update clock voting as optional Message-ID: References: <1647359413-31662-1-git-send-email-quic_srivasam@quicinc.com> <1647359413-31662-8-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1647359413-31662-8-git-send-email-quic_srivasam@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue 15 Mar 10:50 CDT 2022, Srinivasa Rao Mandadapu wrote: > Update bulk clock voting to optional voting as ADSP bypass platform doesn't > need macro and decodec clocks, as these macro and dcodec GDSC switches are > maintained as power domains and operated from lpass clock drivers. > Sorry for missing your reply on my question on the previous version, I think this sounds reasonable. > Signed-off-by: Srinivasa Rao Mandadapu > Co-developed-by: Venkata Prasad Potturu > Signed-off-by: Venkata Prasad Potturu > --- > drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 12 +++++++++--- > drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 1 + > drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 1 + > 3 files changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > index 0216ca1..3fc473a 100644 > --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > @@ -401,9 +401,15 @@ int lpi_pinctrl_probe(struct platform_device *pdev) > return dev_err_probe(dev, PTR_ERR(pctrl->slew_base), > "Slew resource not provided\n"); > > - ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks); > - if (ret) > - return dev_err_probe(dev, ret, "Can't get clocks\n"); > + if (data->is_clk_optional) { > + ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks); > + if (ret) > + return dev_err_probe(dev, ret, "Can't get clocks\n"); Dug into the clk_bulk_get() functions, and __clk_bulk_get() will print an error telling you which clock it failed to get. So I don't think your more generic error here doesn't add any value. Just return ret; > + } else { > + ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks); > + if (ret) > + return dev_err_probe(dev, ret, "Can't get clocks\n"); > + } Depending on your taste, you could do: if (data->is_clk_optional) ret = devm_clk_bulk_get_optional(); else ret = devm_clk_bulk_get(); if (ret) return ret; > > ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks); > if (ret) > diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h > index afbac2a..3bcede6 100644 > --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h > +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h > @@ -77,6 +77,7 @@ struct lpi_pinctrl_variant_data { > int ngroups; > const struct lpi_function *functions; > int nfunctions; > + int is_clk_optional; bool here please. > }; > > int lpi_pinctrl_probe(struct platform_device *pdev); > diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c > index d67ff25..304d8a2 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c > +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c > @@ -142,6 +142,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = { > .ngroups = ARRAY_SIZE(sc7280_groups), > .functions = sc7280_functions, > .nfunctions = ARRAY_SIZE(sc7280_functions), > + .is_clk_optional = 1, true Regards, Bjorn > }; > > static const struct of_device_id lpi_pinctrl_of_match[] = { > -- > 2.7.4 >