From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now
Date: Tue, 5 Apr 2022 21:18:06 +0300 [thread overview]
Message-ID: <YkyH3oqv970FcQL8@intel.com> (raw)
In-Reply-To: <d56c9f3127a5499da87d2759ccd78496@intel.com>
On Fri, Apr 01, 2022 at 07:00:02AM +0000, Shankar, Uma wrote:
>
>
> > -----Original Message-----
> > From: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Sent: Tuesday, March 22, 2022 5:30 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Shankar, Uma
> > <uma.shankar@intel.com>
> > Subject: [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for
> > now
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We lack sufficient state tracking to figure out whether we want the DFP to perform
> > the RGB->YCbCr conversion for us or not. So currently we are blindly just enabling
> > that all the time when supported by the DFP. That is nonsense. So until we imporve
> > our state tracking for this just disable the feature.
> >
> > Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > Cc: Uma Shankar <uma.shankar@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index d3d458b3267d..a57581198a47 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1180,6 +1180,7 @@ static bool intel_dp_supports_dsc(struct intel_dp
> > *intel_dp, static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
> > const struct intel_crtc_state *crtc_state) {
> > + /* FIXME see intel_dp_update_420() regarding rgb_to_ycbcr */
> > return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420
> > ||
> > (crtc_state->output_format ==
> > INTEL_OUTPUT_FORMAT_YCBCR444 &&
> > intel_dp->dfp.ycbcr_444_to_420);
> > @@ -2574,6 +2575,7 @@ void intel_dp_configure_protocol_converter(struct
> > intel_dp *intel_dp,
> > "Failed to %s protocol converter YCbCr 4:2:0 conversion
> > mode\n",
> > str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
> >
> > + /* FIXME see intel_dp_update_420() regarding rgb_to_ycbcr */
> > tmp = intel_dp->dfp.rgb_to_ycbcr ?
> > DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
> >
> > @@ -4430,6 +4432,14 @@ intel_dp_update_420(struct intel_dp *intel_dp)
> > rgb_to_ycbcr = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp-
> > >dpcd,
> > intel_dp-
> > >downstream_ports,
> >
> > DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
> > + /*
> > + * FIXME need to actually track whether we're really
> > + * going to be doing the RGB->YCbCr connversion or not.
> > + * We can't tell by simply looking at intel_dp->dfp.rgb_to_ycbcr.
> > + * Readout is going to annoying due to having to read that
> > + * state from external hardware that may vanish at any time :(
> > + */
> > + rgb_to_ycbcr = false;
>
> I think this will break 8k yuv pcon case as of now.
> @Nautiyal, Ankit K Can we get that fixed. We will need 8k YUV from source due to
> bandwidth constraints.
>
> Rest of the series all looks nice and good.
Left this one alone for now. The FRL bandwidth stuff needs more work as
well anyway, so someone needs to take a good look at all of this at some
point.
Pushed the rest. Thanks for the review.
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2022-04-05 18:18 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-22 12:00 [Intel-gfx] [PATCH v2 00/12] drm/i915: Fix up DP DFP 4:2:0 handling more Ville Syrjala
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 01/12] drm/i915/dp: Extract intel_dp_tmds_clock_valid() Ville Syrjala
2022-04-01 6:19 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 02/12] drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs Ville Syrjala
2022-04-01 6:21 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 03/12] drm/i915/dp: Extract intel_dp_has_audio() Ville Syrjala
2022-04-01 6:22 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 04/12] drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/ Ville Syrjala
2022-04-01 6:24 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 05/12] drm/i915/dp: Reorder intel_dp_compute_config() a bit Ville Syrjala
2022-04-01 6:26 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 06/12] drm/i915/dp: Pass around intel_connector rather than drm_connector Ville Syrjala
2022-04-01 6:27 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 07/12] drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also" modes Ville Syrjala
2022-04-01 6:28 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 08/12] drm/i915/dp: Rework HDMI DFP TMDS clock handling Ville Syrjala
2022-04-01 6:38 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 09/12] drm/i915/dp: Add support for "4:2:0 also" modes for DP Ville Syrjala
2022-04-01 6:40 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 10/12] drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP HDMI DFPs Ville Syrjala
2022-04-01 6:45 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 11/12] drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix Ville Syrjala
2022-04-01 6:56 ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now Ville Syrjala
2022-04-01 7:00 ` Shankar, Uma
2022-04-05 18:18 ` Ville Syrjälä [this message]
2022-03-22 12:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix up DP DFP 4:2:0 handling more (rev2) Patchwork
2022-03-22 13:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-22 19:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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