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From: Sean Christopherson <seanjc@google.com>
To: Maxim Levitsky <mlevitsk@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Gaoning Pan <pgn@zju.edu.cn>, Yongkang Jia <kangel@zju.edu.cn>
Subject: Re: [PATCH 2/4] KVM: nVMX: Defer APICv updates while L2 is active until L1 is active
Date: Tue, 19 Apr 2022 15:57:00 +0000	[thread overview]
Message-ID: <Yl7bzNi9HjbgIAQ5@google.com> (raw)
In-Reply-To: <8b2ff3dc317db18c8128381d5d62057a90f68265.camel@redhat.com>

On Tue, Apr 19, 2022, Maxim Levitsky wrote:
> On Mon, 2022-04-18 at 15:35 +0000, Sean Christopherson wrote:
> > On Mon, Apr 18, 2022, Maxim Levitsky wrote:
> > > On Sat, 2022-04-16 at 03:42 +0000, Sean Christopherson wrote:
> > > When L2 uses APICv/AVIC, we just safely passthrough its usage to the real hardware.
> > > 
> > > If we were to to need to inhibit it, we would have to emulate APICv/AVIC so that L1 would
> > > still think that it can use it - thankfully there is no need for that.
> > 
> > What if L1 passes through IRQs and all MSRs to L2? 

...

> - vmcs02 can't have APICv enabled, because passthrough of interrupts thankfully
>   conflicts with APICv (virtual interrupt delivery depends on intercepting interrupts)
>   and even if that was false, it would have contained L2's APICv settings which should
>   continue to work as usual.

Ah, this was the critical piece I was forgetting.  I'll tweak the changelog and
post a new version.

Thanks!

  reply	other threads:[~2022-04-19 15:57 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-16  3:42 [PATCH 0/4] KVM: x86: APICv fixes Sean Christopherson
2022-04-16  3:42 ` [PATCH 1/4] KVM: x86: Tag APICv DISABLE inhibit, not ABSENT, if APICv is disabled Sean Christopherson
2022-04-18  8:37   ` Maxim Levitsky
2022-04-16  3:42 ` [PATCH 2/4] KVM: nVMX: Defer APICv updates while L2 is active until L1 is active Sean Christopherson
2022-04-18 12:49   ` Maxim Levitsky
2022-04-18 15:35     ` Sean Christopherson
2022-04-19  6:44       ` Maxim Levitsky
2022-04-19 15:57         ` Sean Christopherson [this message]
2022-04-16  3:42 ` [PATCH 3/4] KVM: x86: Pend KVM_REQ_APICV_UPDATE during vCPU creation to fix a race Sean Christopherson
2022-04-18 12:49   ` Maxim Levitsky
2022-04-16  3:42 ` [PATCH 4/4] KVM: x86: Skip KVM_GUESTDBG_BLOCKIRQ APICv update if APICv is disabled Sean Christopherson
2022-04-18 12:50   ` Maxim Levitsky

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