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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id w5-20020a9d3605000000b005b2353c5f4fsm3056541otb.0.2022.05.02.10.04.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 May 2022 10:04:03 -0700 (PDT) Received: (nullmailer pid 1338080 invoked by uid 1000); Mon, 02 May 2022 17:04:03 -0000 Date: Mon, 2 May 2022 12:04:03 -0500 From: Rob Herring To: Jonathan Cameron Cc: Biju Das , Krzysztof Kozlowski , Lad Prabhakar , Lars-Peter Clausen , linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Chris Paterson , Biju Das Subject: Re: [PATCH v2] dt-bindings: iio: adc: Document Renesas RZ/G2UL ADC Message-ID: References: <20220501111952.45872-1-biju.das.jz@bp.renesas.com> <20220501191705.19860b69@jic23-huawei> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220501191705.19860b69@jic23-huawei> Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org On Sun, May 01, 2022 at 07:17:05PM +0100, Jonathan Cameron wrote: > On Sun, 1 May 2022 12:19:52 +0100 > Biju Das wrote: > > > ADC found on RZ/G2UL SoC is almost identical to RZ/G2L SoC, but RZ/G2UL > > has 2 analog input channels compared to 8 channels on RZ/G2L. Therefore, > > added a new compatible to handle this difference. > > > > Signed-off-by: Biju Das > > --- > > v1->v2: > > * Removed Items and used const for RZ/G2UL compatible > > * Add allOf:if:then restricting available channels per SoC variant. > > --- > > .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 34 ++++++++++++++----- > > 1 file changed, 25 insertions(+), 9 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > index d66c24cae1e1..d76c5ba3d625 100644 > > --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > @@ -17,11 +17,13 @@ description: | > > > > properties: > > compatible: > > - items: > > - - enum: > > - - renesas,r9a07g044-adc # RZ/G2L > > - - renesas,r9a07g054-adc # RZ/V2L > > - - const: renesas,rzg2l-adc > > + oneOf: > > + - const: renesas,renesas,r9a07g043-adc # RZ/G2UL > > + - items: > > + - enum: > > + - renesas,r9a07g044-adc # RZ/G2L > > + - renesas,r9a07g054-adc # RZ/V2L > > + - const: renesas,rzg2l-adc > > > > reg: > > maxItems: 1 > > @@ -76,10 +78,24 @@ patternProperties: > > properties: > > reg: > > description: | > > - The channel number. It can have up to 8 channels numbered from 0 to 7. > > - items: > > - - minimum: 0 > > - maximum: 7 > > + The channel number. It can have up to 8 channels numbered from 0 to 7 > > + for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for RZ/G2UL > > + SoC. > > + allOf: > > + if: > - if: > properties: > etc > > Otherwise I think you can only have one in your allOf: which rather > removes the point of having one. > > I was surprised this passed the checks, so added another if to verify my > reasoning... It didn't apply, so checks didn't run. But it should fail not for the reason you correctly identified, but because 'allOf' is a DT property here not json-schema vocabulary. Rob