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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="g4A2vc3PI9AlducC" Content-Disposition: inline In-Reply-To: <663a03ad-9df1-173e-19b1-4f4af1aa9b37@suse.com> --g4A2vc3PI9AlducC Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 20 May 2022 12:32:35 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Andrew Cooper , George Dunlap , Julien Grall , Stefano Stabellini , Wei Liu , xen-devel@lists.xenproject.org Subject: Re: [PATCH v6 2/2] ns16550: Add more device IDs for Intel LPSS UART On Fri, May 20, 2022 at 11:42:37AM +0200, Jan Beulich wrote: > On 20.05.2022 10:53, Marek Marczykowski-G=C3=B3recki wrote: > > This is purely based on the spec: > > - Intel 500 Series PCH: 635218-006 > > - Intel 600 Series PCH: 691222-001, 648364-003 > >=20 > > This is tested only on TGL-LP added initially, but according to the > > spec, they should behave the same. > >=20 > > Signed-off-by: Marek Marczykowski-G=C3=B3recki > > Acked-by: Andrew Cooper >=20 > Oops? Commit 1f0b1f5cce9d. Right, I haven't fetch new master. No changes here for several iterations, so everything is fine. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --g4A2vc3PI9AlducC Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmKHbkQACgkQ24/THMrX 1yzVawf+MR7Xp1jDHLPL6l4O6M7MINpcDf+sJnBMj+mkaYAi5UheRw5VHTMkBYEs HxReVlNPnQCDlUvx1hUuLOyPuPDb0FmOag5D6gNl7mlpEVV4q/mX0SznPAeC51N0 3XcDAcMUIVylvjVJRkrWnZJl6X6yibzzw8DqsgrdtHonYFLciLPeS5EMzAOKoN/a rfpa9V7ZF2l4go5WUBpyFQE6QnsuVwR9ybdyrXLa6FxwMkUUS50kUkhe+QuJEsfE SK3BxlgTTxsIFy7XdCBFUzIaK1dAxAjl5S1Xee8VHp7p4M0SSKU4eR7qFNnIzmz6 ZvmkFWztSBQDOVQlng1IsVKHJu+UBg== =BJ05 -----END PGP SIGNATURE----- --g4A2vc3PI9AlducC--