From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Siddharth Vadapalli <s-vadapalli@ti.com>
Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, vladimir.oltean@nxp.com,
grygorii.strashko@ti.com, vigneshr@ti.com, nsekhar@ti.com,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, kishon@ti.com
Subject: Re: [PATCH 2/3] net: ethernet: ti: am65-cpsw: Add support for QSGMII mode
Date: Tue, 31 May 2022 12:50:30 +0100 [thread overview]
Message-ID: <YpYBBp8Io116bBwM@shell.armlinux.org.uk> (raw)
In-Reply-To: <20220531113058.23708-3-s-vadapalli@ti.com>
On Tue, May 31, 2022 at 05:00:57PM +0530, Siddharth Vadapalli wrote:
> static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode,
> const struct phylink_link_state *state)
> {
> - /* Currently not used */
> + struct am65_cpsw_slave_data *slave = container_of(config, struct am65_cpsw_slave_data,
> + phylink_config);
> + struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave);
> +
> + if (state->interface == PHY_INTERFACE_MODE_QSGMII)
> + writel(AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE,
> + port->sgmii_base + AM65_CPSW_SGMII_CONTROL_REG);
What about writing this register when the interface mode isn't QSGMII?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2022-05-31 11:50 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-31 11:30 [PATCH 0/3] Add support for QSGMII mode to am65-cpsw driver Siddharth Vadapalli
2022-05-31 11:30 ` [PATCH 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200 CPSW5G Siddharth Vadapalli
2022-05-31 11:30 ` [PATCH 2/3] net: ethernet: ti: am65-cpsw: Add support for QSGMII mode Siddharth Vadapalli
2022-05-31 11:50 ` Russell King (Oracle) [this message]
2022-06-01 6:05 ` Siddharth Vadapalli
2022-05-31 11:30 ` [PATCH 3/3] net: ethernet: ti: am65-cpsw: Move phy_set_mode_ext() to correct location Siddharth Vadapalli
2022-05-31 11:55 ` Russell King (Oracle)
2022-06-01 6:09 ` Siddharth Vadapalli
2022-06-01 8:29 ` Russell King (Oracle)
2022-06-01 9:29 ` Siddharth Vadapalli
2022-06-01 9:55 ` Russell King (Oracle)
2022-06-01 11:47 ` Siddharth Vadapalli
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YpYBBp8Io116bBwM@shell.armlinux.org.uk \
--to=linux@armlinux.org.uk \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=edumazet@google.com \
--cc=grygorii.strashko@ti.com \
--cc=kishon@ti.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=nsekhar@ti.com \
--cc=pabeni@redhat.com \
--cc=robh+dt@kernel.org \
--cc=s-vadapalli@ti.com \
--cc=vigneshr@ti.com \
--cc=vladimir.oltean@nxp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.