From: Vinod Koul <vkoul@kernel.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
dmaengine@vger.kernel.org, Emil Renner Berthing <kernel@esmil.dk>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Pandith N <pandith.n@intel.com>,
Michael Zhu <michael.zhu@starfivetech.com>,
linux-kernel@vger.kernel.org,
Samin Guo <samin.guo@starfivetech.com>
Subject: Re: [PATCH] dmaengine: dw-axi-dmac: Fix RMW on channel suspend register
Date: Fri, 1 Jul 2022 17:18:34 +0530 [thread overview]
Message-ID: <Yr7fEleQDs2qBJTP@matsya> (raw)
In-Reply-To: <20220627090939.1775717-1-emil.renner.berthing@canonical.com>
On 27-06-22, 11:09, Emil Renner Berthing wrote:
> From: Emil Renner Berthing <kernel@esmil.dk>
>
> When the DMA is configured for more than 8 channels the bits controlling
> suspend moves to another register. However when adding support for this
> the new register would be completely overwritten in one case and
> overwritten with values from the old register in another case.
>
> Found by comparing the parallel implementation of more than 8 channel
> support for the StarFive JH7100 SoC by Samin.
Applied, thanks
--
~Vinod
prev parent reply other threads:[~2022-07-01 11:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-27 9:09 [PATCH] dmaengine: dw-axi-dmac: Fix RMW on channel suspend register Emil Renner Berthing
2022-07-01 11:48 ` Vinod Koul [this message]
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