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From: Ira Weiny <ira.weiny@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Dan Williams <dan.j.williams@intel.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"Alison Schofield" <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Ben Widawsky <bwidawsk@kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
	<linux-pci@vger.kernel.org>
Subject: Re: [PATCH V11 3/8] PCI: Create PCI library functions in support of DOE mailboxes.
Date: Wed, 22 Jun 2022 16:06:16 -0700	[thread overview]
Message-ID: <YrOgaBPFvBzGy5oe@iweiny-desk3> (raw)
In-Reply-To: <20220620102449.000041d4@Huawei.com>

On Mon, Jun 20, 2022 at 10:24:49AM +0100, Jonathan Cameron wrote:
> 
> Hi Bjorn,
> 
> Thanks for reviewing!  Up to Ira of course, but I agree with all your
> comments

Me too!  :-D

> - a few responses to questions follow.
>
> 
> > 
> > > + * pci_doe_supports_prot() - Return if the DOE instance supports the given
> > > + *			     protocol
> > > + * @doe_mb: DOE mailbox capability to query
> > > + * @vid: Protocol Vendor ID
> > > + * @type: Protocol type
> > > + *
> > > + * RETURNS: True if the DOE mailbox supports the protocol specified  
> > 
> > Is the typical use that the caller has a few specific protocols it
> > cares about?  There's no case where a caller might want to enumerate
> > them all?  I guess they're all in prots[], but that's supposed to be
> > opaque to users.
> 
> Given each protocol needs specific handling in the driver, the only
> usecase for a general enumeration would be debug I think.  Maybe
> it makes sense to provide that info to userspace somewhere, but
> definitely feels like something for a follow up discussion.

Yep, CXL just needs to find out which mailbox has CDAT on it.

> > 
> > > + */
> > > +bool pci_doe_supports_prot(struct pci_doe_mb *doe_mb, u16 vid, u8 type)
> > > +{
> > > +	int i;
> > > +
> > > +	/* The discovery protocol must always be supported */
> > > +	if (vid == PCI_VENDOR_ID_PCI_SIG && type == PCI_DOE_PROTOCOL_DISCOVERY)
> > > +		return true;
> > > +
> > > +	for (i = 0; i < doe_mb->num_prots; i++)
> > > +		if ((doe_mb->prots[i].vid == vid) &&
> > > +		    (doe_mb->prots[i].type == type))
> > > +			return true;
> > > +
> > > +	return false;
> > > +}
> > > +EXPORT_SYMBOL_GPL(pci_doe_supports_prot);  
> > 
> > > + * struct pci_doe_task - represents a single query/response
> > > + *
> > > + * @prot: DOE Protocol
> > > + * @request_pl: The request payload
> > > + * @request_pl_sz: Size of the request payload  
> > 
> > Size is in dwords, not bytes, I guess?
> 
> It's in bytes (IIRC) - we divide it by. It's a bit of a mess,
> but there are parts of SPDM over CMA where messages are not
> full number of dwords. My thinking was that we 'might' move
> the padding into the generic code if this becomes something
> multiple protocols need.  For now the RFC does the
> padding at the CMA layer.

I think at this layer the DOE protocol specifies all message sizes are in
multiples of DW's.  So I think this layer should enforce that.  Other protocols
will need to pad if they need to based on their need.

> Let's avoid this being unclear in future by stating that it's
> in bytes in the comment.

Already done!

Thanks Jonathan!
Ira

> 
> Jonathan
> 
> > 
> > > + * @response_pl: The response payload
> > > + * @response_pl_sz: Size of the response payload
> > > + * @rv: Return value.  Length of received response or error
> > > + * @complete: Called when task is complete
> > > + * @private: Private data for the consumer
> > > + */
> > > +struct pci_doe_task {
> > > +	struct pci_doe_protocol prot;
> > > +	u32 *request_pl;
> > > +	size_t request_pl_sz;
> > > +	u32 *response_pl;
> > > +	size_t response_pl_sz;
> > > +	int rv;
> > > +	void (*complete)(struct pci_doe_task *task);
> > > +	void *private;
> > > +};  
> 

  reply	other threads:[~2022-06-22 23:06 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-10 20:22 [PATCH V11 0/8] CXL: Read CDAT and DSMAS data ira.weiny
2022-06-10 20:22 ` [PATCH V11 1/8] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-06-10 20:22 ` [PATCH V11 2/8] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-06-10 20:22 ` [PATCH V11 3/8] PCI: Create PCI library functions in support of DOE mailboxes ira.weiny
2022-06-14  3:53   ` Li, Ming
2022-06-15  4:18     ` Ira Weiny
2022-06-17 22:40   ` Bjorn Helgaas
2022-06-18 16:39     ` Bjorn Helgaas
2022-06-22 16:46       ` Ira Weiny
2022-06-20  9:24     ` Jonathan Cameron
2022-06-22 23:06       ` Ira Weiny [this message]
2022-06-22 16:38     ` Ira Weiny
2022-06-17 22:56   ` Dan Williams
2022-06-20 10:23     ` Jonathan Cameron
2022-06-22 22:57       ` Ira Weiny
2022-06-23 18:03         ` Dan Williams
2022-06-22 22:37     ` Ira Weiny
2022-06-22 22:45     ` Ira Weiny
2022-06-22 22:57       ` Dan Williams
2022-06-23  0:25         ` Ira Weiny
2022-06-23 10:24           ` Jonathan Cameron
2022-06-23 18:14             ` Dan Williams
2022-06-23 18:07           ` Dan Williams
2022-06-10 20:22 ` [PATCH V11 4/8] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-06-17 20:40   ` [PATCH v11 " Davidlohr Bueso
2022-06-17 20:51     ` Davidlohr Bueso
2022-06-21 18:24     ` Ira Weiny
2022-06-17 23:44   ` [PATCH V11 " Dan Williams
2022-06-21 18:29     ` Ira Weiny
2022-06-22 23:18       ` Ira Weiny
2022-06-21 20:37   ` Bjorn Helgaas
2022-06-10 20:22 ` [PATCH V11 5/8] cxl/port: Read CDAT table ira.weiny
2022-06-18  0:43   ` Dan Williams
2022-06-21 19:10     ` Dan Williams
2022-06-21 19:34       ` Lukas Wunner
2022-06-21 19:41         ` Dan Williams
2022-06-21 20:38           ` Ira Weiny
2022-06-21 21:14     ` Ira Weiny
2022-06-21 21:48       ` Dan Williams
2022-06-28  3:24         ` Ira Weiny
2022-06-10 20:22 ` [PATCH V11 6/8] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-06-10 20:22 ` [PATCH V11 7/8] cxl/port: Retry reading CDAT on failure ira.weiny
2022-06-28  3:32   ` Alison Schofield
2022-06-10 20:22 ` [PATCH V11 8/8] cxl/port: Parse out DSMAS data from CDAT table ira.weiny

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