From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 704A8CCA479 for ; Mon, 4 Jul 2022 09:54:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233614AbiGDJyq (ORCPT ); Mon, 4 Jul 2022 05:54:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47984 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233264AbiGDJyq (ORCPT ); Mon, 4 Jul 2022 05:54:46 -0400 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00D00DE9A for ; Mon, 4 Jul 2022 02:54:45 -0700 (PDT) Received: by mail-wm1-x32d.google.com with SMTP id f190so5058175wma.5 for ; Mon, 04 Jul 2022 02:54:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to; bh=5OEPF06YG+R+5ZW0yjo5uKv8/e38xtFyRSfd8rSL5/U=; b=iWnJOtER2NaaLsbBoB0+Px3zo6/Ay8a1Tx7Tpv0T77HJg7B6MTzuireRG0B9U+fuAJ 9UbuJNDuIh6p/REByNa+ODA5uMyc6Z63A+AwMzxBUb7wQDsfgW4ovI9iOEmEtOgoib2D is4YPKL7me/MkEd38NaByuGbU2cubsRzIWe5So5A4CYnP6FjgSYE2tBg31ZzhvYU5BR1 Ylf1IWBeh40N7No/NiV2hAAYbAu1xe9+unEdAvOAof48LUiH6w/j8YMMxhwUshyabtfI WLzI930mHrjXWi3NaMDxptGBkhSJCZmUUrjxhkbrrFA7thG42Q9wnTTV13m/pXU+O217 ANAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=5OEPF06YG+R+5ZW0yjo5uKv8/e38xtFyRSfd8rSL5/U=; b=bSqRF70zTa0kDEItNPiBCJIqXHIfB8XKT3DZTuG+gHtusEDYe0vH70+m6I4ttiE9RW tgxbo11nTVpx5DEkgqWmffnnd3Rxqz4hX/CvA0wEE/t9If4cEzO8feVkZ2roYMoTTSl8 N9ArnHj1jI2lbYQU1pV9lvBnMJj6/XbDJ0ZDt06aJGf5xdSz0W9mq8fza88W1BjdIieq idGoyJolY8+HbJJP2uPLStCo3DLFxq7HAstNGhUsAD/q6lTFakxWp8XEY4pTvJcy19Zi CQGHUJZL4S5sl8QfpLSVhbk+SR/5J4Px/2tFwwlhlUJ18L/quCP7FjIy5shr1/xQ6Xv9 Mfog== X-Gm-Message-State: AJIora9TzyLDTVRveIr3z15l7e3AXdJrNBwk8uXM0qn3hoEQi1afDHy1 K3/wxoYMYrmzRin6ItK7WumulA== X-Google-Smtp-Source: AGRyM1svy/vCXA649RppIhdoxQ//h/2ofd0wM3BTvLiHTMabydo4tf4xJZ3LiMzhyn9E3gWku6ATSg== X-Received: by 2002:a05:600c:2298:b0:3a0:31a9:710b with SMTP id 24-20020a05600c229800b003a031a9710bmr30056672wmf.115.1656928483406; Mon, 04 Jul 2022 02:54:43 -0700 (PDT) Received: from google.com (cpc155339-bagu17-2-0-cust87.1-3.cable.virginm.net. [86.27.177.88]) by smtp.gmail.com with ESMTPSA id n5-20020a1ca405000000b0039c587342d8sm15023400wme.3.2022.07.04.02.54.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Jul 2022 02:54:42 -0700 (PDT) Date: Mon, 4 Jul 2022 10:54:40 +0100 From: Lee Jones To: ChiYuan Huang Cc: Rob Herring , Krzysztof Kozlowski , Mark Brown , dmitry.torokhov@gmail.com, Liam Girdwood , cy_huang , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , lkml , linux-input@vger.kernel.org Subject: Re: [PATCH v2 2/4] mfd: rt5120: Add Richtek PMIC support Message-ID: References: <1655892104-10874-1-git-send-email-u0084500@gmail.com> <1655892104-10874-3-git-send-email-u0084500@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org On Mon, 04 Jul 2022, ChiYuan Huang wrote: > Hi, Lee: > > ChiYuan Huang 於 2022年7月1日 週五 下午5:56寫道: > > > > Lee Jones 於 2022年7月1日 週五 下午3:38寫道: > > > > > > On Fri, 01 Jul 2022, ChiYuan Huang wrote: > > > > > > > HI, Lee: > > > > > > > > ChiYuan Huang 於 2022年6月27日 週一 晚上10:56寫道: > > > > > > > > > > Lee Jones 於 2022年6月27日 週一 晚上10:22寫道: > > > > > > > > > > > > On Wed, 22 Jun 2022, cy_huang wrote: > > > > > > > > > > > > > From: ChiYuan Huang > > > > > > > > > > > > > > Add Richtek RT5120 PMIC I2C driver. > > > > > > > > > > > > Why a whole new driver? > > > > > > > > > > > > How different is this to rt5033? > > > > > > > > > > > > Looks like this could easily be woven into this existing support? > > > > > > > > > > > It's different with the function domain. > > > > > RT5033 is most like as the SubPMIC that includes PMU (battery > > > > > charger/gauge/led/few buck and ldo) > > > > > RT5120 is a main PMIC with default-on power that follows the boot on sequence. > > > > > RT5120 only integrates regulator and power key report module. > > > > > > > > > Since I have explained the chip difference, do you still think it's > > > > better to merge this code into rt5033 mfd? > > > > > > I think it's okay to group devices which are similar but not exactly > > > the same, if they can be. The integration of this device into the > > > other looks trivial to my naive eyes. > > > > > > A PMIC is a PMIC, main or sub. > > > > > M.. ok. I will try to group all chip changes like as devices > > list/regmap_irq/regmap_config ..., etc. > > Treat it as one set of chip config and use 'of_device_get_match_data' > > to get the chip config data. > > > There's a question. > As I know, it's not the same chip series. > The rt5033 is submitted from Samsung at 2015. > The driver data is also defined in header file. > > Do you still suggest to do the merge? > Even in our internal, it's difficult to find a rt5033 EVB for testing. > > And one more question is the binding. If yes, for the binding, I need to add > rt5033 related..... > > Actually, it's a tough work. If it's genuinely difficult to integrate, you can keep them separate. -- Lee Jones [李琼斯] Principal Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog