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From: Peter Delevoryas <peter@pjd.dev>
To: Joel Stanley <joel@jms.id.au>
Cc: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Andrew Jeffery" <andrew@aj.id.au>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>
Subject: Re: [PATCH 5/8] aspeed: Add fby35 skeleton
Date: Tue, 5 Jul 2022 00:58:41 -0700	[thread overview]
Message-ID: <YsPvMUfG6CzK9LSz@pdel-mbp> (raw)
In-Reply-To: <CACPK8XfcZM+9sk4f=fCtW2zVioN0sgoT=o+dF62U=AMZuUsL6g@mail.gmail.com>

On Tue, Jul 05, 2022 at 06:53:43AM +0000, Joel Stanley wrote:
> On Mon, 4 Jul 2022 at 21:55, Peter Delevoryas <peter@pjd.dev> wrote:
> >
> > Signed-off-by: Peter Delevoryas <peter@pjd.dev>
> > Reviewed-by: Cédric Le Goater <clg@kaod.org>
> > ---
> >  MAINTAINERS        |  1 +
> >  hw/arm/fby35.c     | 39 +++++++++++++++++++++++++++++++++++++++
> >  hw/arm/meson.build |  3 ++-
> >  3 files changed, 42 insertions(+), 1 deletion(-)
> >  create mode 100644 hw/arm/fby35.c
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index d9378511b7..147330ddd7 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -1067,6 +1067,7 @@ F: hw/net/ftgmac100.c
> >  F: include/hw/net/ftgmac100.h
> >  F: docs/system/arm/aspeed.rst
> >  F: tests/qtest/*aspeed*
> > +F: hw/arm/fby35.c
> >
> >  NRF51
> >  M: Joel Stanley <joel@jms.id.au>
> > diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
> > new file mode 100644
> > index 0000000000..03b458584c
> > --- /dev/null
> > +++ b/hw/arm/fby35.c
> > @@ -0,0 +1,39 @@
> > +/*
> > + * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com)
> 
> Can you mention what fby35 means? I keep reading your patches but can't recall.

Oh yeah sure, it means "Facebook Yosemite version 3.5". Facebook has a series
of multi-node compute server designs named Yosemite, the most recent version
was Yosemite 3:

https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1v16-pdf

Yosemite 3.5 is an iteration on this design. It's actually very similar in terms
of there being a BMC on the baseboard, and a Bridge IC (BIC) on each server
board, with room for expansion boards as well.

I'm still debugging I2C a little bit, but my goal is to be able to test BMC <->
BIC IPMB messages with the full OpenBMC firmware running on the BMC and the
OpenBIC firmware running on the BIC, and to expand this machine to include the
other 3 slot BIC's (in this patch series, I only included the BIC in the first
slot).

> 
> > + *
> > + * This code is licensed under the GPL version 2 or later. See the COPYING
> > + * file in the top-level directory.
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "hw/boards.h"
> > +
> > +#define TYPE_FBY35 MACHINE_TYPE_NAME("fby35")
> > +OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35);
> > +
> > +struct Fby35State {
> > +    MachineState parent_obj;
> > +};
> > +
> > +static void fby35_init(MachineState *machine)
> > +{
> > +}
> > +
> > +static void fby35_class_init(ObjectClass *oc, void *data)
> > +{
> > +    MachineClass *mc = MACHINE_CLASS(oc);
> > +
> > +    mc->desc = "Meta Platforms fby35";
> > +    mc->init = fby35_init;
> > +}
> > +
> > +static const TypeInfo fby35_types[] = {
> > +    {
> > +        .name = MACHINE_TYPE_NAME("fby35"),
> > +        .parent = TYPE_MACHINE,
> > +        .class_init = fby35_class_init,
> > +        .instance_size = sizeof(Fby35State),
> > +    },
> > +};
> > +
> > +DEFINE_TYPES(fby35_types);
> > diff --git a/hw/arm/meson.build b/hw/arm/meson.build
> > index 2d8381339c..92f9f6e000 100644
> > --- a/hw/arm/meson.build
> > +++ b/hw/arm/meson.build
> > @@ -51,7 +51,8 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
> >    'aspeed_soc.c',
> >    'aspeed.c',
> >    'aspeed_ast2600.c',
> > -  'aspeed_ast10x0.c'))
> > +  'aspeed_ast10x0.c',
> > +  'fby35.c'))
> >  arm_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2.c'))
> >  arm_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2-tz.c'))
> >  arm_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-soc.c'))
> > --
> > 2.37.0
> >

  reply	other threads:[~2022-07-05  7:59 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-04 21:54 [PATCH 1/8] hw/i2c/pca954x: Add method to get channels Peter Delevoryas
2022-07-04 21:54 ` [PATCH 2/8] aspeed: Create SRAM name from first CPU index Peter Delevoryas
2022-07-05  5:47   ` Cédric Le Goater
2022-07-04 21:54 ` [PATCH 3/8] aspeed: Refactor UART init for multi-SoC machines Peter Delevoryas
2022-07-05  5:49   ` Cédric Le Goater
2022-07-04 21:54 ` [PATCH 4/8] aspeed: Make aspeed_board_init_flashes public Peter Delevoryas
2022-07-05  5:49   ` Cédric Le Goater
2022-07-04 21:54 ` [PATCH 5/8] aspeed: Add fby35 skeleton Peter Delevoryas
2022-07-05  6:53   ` Joel Stanley
2022-07-05  7:58     ` Peter Delevoryas [this message]
2022-07-05  8:09       ` Cédric Le Goater
2022-07-04 21:54 ` [PATCH 6/8] aspeed: Add AST2600 (BMC) to fby35 Peter Delevoryas
2022-07-05  5:49   ` Cédric Le Goater
2022-07-04 21:54 ` [PATCH 7/8] aspeed: fby35: Add a bootrom for the BMC Peter Delevoryas
2022-07-04 21:54 ` [PATCH 8/8] aspeed: Add AST1030 (BIC) to fby35 Peter Delevoryas
2022-07-05  5:50   ` Cédric Le Goater
2022-07-05  5:46 ` [PATCH 1/8] hw/i2c/pca954x: Add method to get channels Cédric Le Goater
2022-07-06 16:41   ` Patrick Venture

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