From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76C07CCA47B for ; Thu, 14 Jul 2022 13:19:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239480AbiGNNTn (ORCPT ); Thu, 14 Jul 2022 09:19:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239428AbiGNNTl (ORCPT ); Thu, 14 Jul 2022 09:19:41 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [185.16.172.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0A9152FE1; Thu, 14 Jul 2022 06:19:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Transfer-Encoding:Content-Disposition: Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:From: Sender:Reply-To:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Content-Disposition: In-Reply-To:References; bh=qkksVEBsCjPaHx8+ptjtKd+HcC8nBi1sTfjXD4WRlds=; b=xw 9yGMi+YrNTJOLYxGMkDGA/cxANj5nCGoB1T4gTZEUWTLyH8KAVlqkHDE+0PkAyVDqeYnMq+3zuLkD UTIgAmlodwQvB1zBQDqk/SRiw3bPM8K/iKejcDHcfnV9hShqqotoA9hYkWGgo4WjeMKFPwIg1qtzt t7PeoKg0megdni4=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1oBykd-00AHn5-Lx; Thu, 14 Jul 2022 15:19:31 +0200 Date: Thu, 14 Jul 2022 15:19:31 +0200 From: Andrew Lunn To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Thierry Reding , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Lee Jones , Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Gregory Clement , Sebastian Hesselbarth , Marek =?iso-8859-1?Q?Beh=FAn?= , linux-pwm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/4] gpio: mvebu: Fix check for pwm support on non-A8K platforms Message-ID: References: <20220714115515.5748-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220714115515.5748-1-pali@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Thu, Jul 14, 2022 at 01:55:12PM +0200, Pali Rohár wrote: > pwm support incompatible with Armada 80x0/70x0 API is not only in > Armada 370, but also in Armada XP, 38x and 39x. So basically every non-A8K > platform. Fix check for pwm support appropriately. > > Fixes: 85b7d8abfec7 ("gpio: mvebu: add pwm support for Armada 8K/7K") > Signed-off-by: Pali Rohár > --- > drivers/gpio/gpio-mvebu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c > index 2db19cd640a4..70a22b68c034 100644 > --- a/drivers/gpio/gpio-mvebu.c > +++ b/drivers/gpio/gpio-mvebu.c > @@ -793,8 +793,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, > u32 offset; > u32 set; > > - if (of_device_is_compatible(mvchip->chip.of_node, > - "marvell,armada-370-gpio")) { > + if (mvchip->soc_variant != MVEBU_GPIO_SOC_VARIANT_A8K) { > /* > * There are only two sets of PWM configuration registers for > * all the GPIO lines on those SoCs which this driver reserves The current code is: if (of_device_is_compatible(mvchip->chip.of_node, "marvell,armada-370-gpio")) { /* * There are only two sets of PWM configuration registers for * all the GPIO lines on those SoCs which this driver reserves * for the first two GPIO chips. So if the resource is missing * we can't treat it as an error. */ if (!platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm")) return 0; offset = 0; } else if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) { int ret = of_property_read_u32(dev->of_node, "marvell,pwm-offset", &offset); if (ret < 0) return 0; } else { return 0; } With your change, don't we end up with: if (foo) ..... else if (!foo) ..... else ..... The static analysers are going to complain about this. Andrew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8EFB3C43334 for ; Thu, 14 Jul 2022 13:20:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3S/fvUAgQQqP8u1sTx9t32iCnETk81IBTV2eBdtNQxU=; b=R0m8SQMkjjxw/h 5kzhzdVBJ8/5/PuRNjYxP1XcjERI+ypaWn+g8ZlMtak/CliChRmYMN/+WFfiNqM9LWyVMsrSpXaaa bAIwztWJ6JKt7OicPmSxpr2SJn+7Jj0HrtBDpzVFSaMCwDNA74P4eaQ0xuomZxDvyVHw+o557QpSd UV9Kvsds9q6rK/37hzMo6fM5YyHxlIe75jn0J5lVH1pPPkcOrdzCUOb21FUkGulnp3ukOardJG02I vibEyKasvhLlJD5tjIWODTnV1y7B4+OkCnUP/8h/LKz/qth0qT4CZpV1nmXBFl50WVj4K4LwHRyrJ 1IslwnWbt8weE+7Wk9mA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oBykx-00Eebk-9P; Thu, 14 Jul 2022 13:19:51 +0000 Received: from vps0.lunn.ch ([185.16.172.187]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oBykt-00EeW0-BR for linux-arm-kernel@lists.infradead.org; Thu, 14 Jul 2022 13:19:49 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Transfer-Encoding:Content-Disposition: Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:From: Sender:Reply-To:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Content-Disposition: In-Reply-To:References; bh=qkksVEBsCjPaHx8+ptjtKd+HcC8nBi1sTfjXD4WRlds=; b=xw 9yGMi+YrNTJOLYxGMkDGA/cxANj5nCGoB1T4gTZEUWTLyH8KAVlqkHDE+0PkAyVDqeYnMq+3zuLkD UTIgAmlodwQvB1zBQDqk/SRiw3bPM8K/iKejcDHcfnV9hShqqotoA9hYkWGgo4WjeMKFPwIg1qtzt t7PeoKg0megdni4=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1oBykd-00AHn5-Lx; Thu, 14 Jul 2022 15:19:31 +0200 Date: Thu, 14 Jul 2022 15:19:31 +0200 From: Andrew Lunn To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Thierry Reding , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Lee Jones , Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Gregory Clement , Sebastian Hesselbarth , Marek =?iso-8859-1?Q?Beh=FAn?= , linux-pwm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/4] gpio: mvebu: Fix check for pwm support on non-A8K platforms Message-ID: References: <20220714115515.5748-1-pali@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220714115515.5748-1-pali@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220714_061947_430145_60A0CD8B X-CRM114-Status: GOOD ( 20.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 14, 2022 at 01:55:12PM +0200, Pali Roh=E1r wrote: > pwm support incompatible with Armada 80x0/70x0 API is not only in > Armada 370, but also in Armada XP, 38x and 39x. So basically every non-A8K > platform. Fix check for pwm support appropriately. > = > Fixes: 85b7d8abfec7 ("gpio: mvebu: add pwm support for Armada 8K/7K") > Signed-off-by: Pali Roh=E1r > --- > drivers/gpio/gpio-mvebu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > = > diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c > index 2db19cd640a4..70a22b68c034 100644 > --- a/drivers/gpio/gpio-mvebu.c > +++ b/drivers/gpio/gpio-mvebu.c > @@ -793,8 +793,7 @@ static int mvebu_pwm_probe(struct platform_device *pd= ev, > u32 offset; > u32 set; > = > - if (of_device_is_compatible(mvchip->chip.of_node, > - "marvell,armada-370-gpio")) { > + if (mvchip->soc_variant !=3D MVEBU_GPIO_SOC_VARIANT_A8K) { > /* > * There are only two sets of PWM configuration registers for > * all the GPIO lines on those SoCs which this driver reserves The current code is: if (of_device_is_compatible(mvchip->chip.of_node, "marvell,armada-370-gpio")) { /* * There are only two sets of PWM configuration registers f= or * all the GPIO lines on those SoCs which this driver reser= ves * for the first two GPIO chips. So if the resource is miss= ing * we can't treat it as an error. */ if (!platform_get_resource_byname(pdev, IORESOURCE_MEM, "pw= m")) return 0; offset =3D 0; } else if (mvchip->soc_variant =3D=3D MVEBU_GPIO_SOC_VARIANT_A8K) { int ret =3D of_property_read_u32(dev->of_node, "marvell,pwm-offset", &offse= t); if (ret < 0) return 0; } else { return 0; } With your change, don't we end up with: if (foo) ..... else if (!foo) ..... else ..... The static analysers are going to complain about this. Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel