From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4D1D6C2BB41 for ; Tue, 16 Aug 2022 07:53:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GkXBwRFrtO/vRXkHljgSml/nQ9Lrjvbt1OkySIKgLdQ=; b=wFyS8kV+eyRHdk kaWwZQTWKyQMAM7JGtxIsclBsdvYWjAadNmrqnRG0gVsRr9L4pwqlnb9SHMn4DZ1vyywVxBSNY0Qs /Hk2RWwwPg0u2eG2bVE7Phx3cBjKVDckTnmJDa2egB8Pw+XaRcNHpEYCpdq1aZNOQoCnCGuRY22M0 PushTks9nlCT2yFhXD5zZq6QuW7w6+YmnQfZKHN8IRQ51LtXaLcG76382wlenhwJI9WWXuX4VkGEx LrXmHaFz9XISOLZypZUj0exJchSIU2cES2Jqg2HXSKFCjydXagfdp6+lHVJIF0f3WS/sd2lWpYA0C N9r9r6ZcEzOvjWkDXG2A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oNrN8-00FoRo-3o; Tue, 16 Aug 2022 07:52:22 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oNrMc-00Fo5y-G0 for linux-arm-kernel@lists.infradead.org; Tue, 16 Aug 2022 07:51:55 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 425E860B25; Tue, 16 Aug 2022 07:51:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C3A48C433D7; Tue, 16 Aug 2022 07:51:46 +0000 (UTC) Date: Tue, 16 Aug 2022 08:51:47 +0100 From: Catalin Marinas To: Peter Collingbourne Cc: Evgenii Stepanov , Marc Zyngier , Will Deacon , Vincenzo Frascino , Andrey Konovalov , Mark Brown , Linux ARM , LKML Subject: Re: [PATCH] mte: Follow arm64.nomte override in MMU setup. Message-ID: References: <20220805214734.1937451-1-eugenis@google.com> <875yj1x0k0.wl-maz@kernel.org> <87v8r1uztz.wl-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220816_005150_609874_66E98EAA X-CRM114-Status: GOOD ( 22.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Aug 09, 2022 at 06:24:23PM -0700, Peter Collingbourne wrote: > On Tue, Aug 9, 2022 at 10:29 AM Evgenii Stepanov wrote: > > On Tue, Aug 9, 2022 at 9:49 AM Marc Zyngier wrote: > > > In which case what is the tag memory doing in the linear map? > > > Shouldn't it be marked as reserved, not mapped, and in general > > > completely ignored by the NS OS? > > > > That would be wasteful. The idea is to only reserve the parts of the > > tag memory that correspond to the TZ carveout and release the rest to > > the NS OS. > > More generally, one can imagine a system where *any* tagged memory > transaction can result in an SError because the MTE implementation was > not configured by an earlier bootloader phase, e.g. because the > bootloader was configured to disable MTE at runtime. On such systems, > the kernel must refrain from causing tagged memory transactions to be > issued via the linear map, and that's exactly what this patch does. The problem is that it doesn't. The 8.5 architecture allows any Normal Cacheable (even non-tagged) mapping to fetch tags. It may happen that on certain implementations setting MAIR to non-tagged works but that's not guaranteed and with the Linux kernel we tend to stick to the architected behaviour (with a few exceptions like PMU counters and errata). There is an ongoing discussion with the architects and partners on whether we can tighten the architecture as not to cause visible side-effects like SError but not sure whether that has been closed yet (just back from holiday). Until that's sorted, tag storage cannot be reused in an arm64-generic way in the kernel. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD024C2BB41 for ; Tue, 16 Aug 2022 09:31:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233657AbiHPJbl (ORCPT ); Tue, 16 Aug 2022 05:31:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40484 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233631AbiHPJac (ORCPT ); Tue, 16 Aug 2022 05:30:32 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E2B3DEC9 for ; Tue, 16 Aug 2022 00:51:51 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id DD3BAB81647 for ; Tue, 16 Aug 2022 07:51:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C3A48C433D7; Tue, 16 Aug 2022 07:51:46 +0000 (UTC) Date: Tue, 16 Aug 2022 08:51:47 +0100 From: Catalin Marinas To: Peter Collingbourne Cc: Evgenii Stepanov , Marc Zyngier , Will Deacon , Vincenzo Frascino , Andrey Konovalov , Mark Brown , Linux ARM , LKML Subject: Re: [PATCH] mte: Follow arm64.nomte override in MMU setup. Message-ID: References: <20220805214734.1937451-1-eugenis@google.com> <875yj1x0k0.wl-maz@kernel.org> <87v8r1uztz.wl-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 09, 2022 at 06:24:23PM -0700, Peter Collingbourne wrote: > On Tue, Aug 9, 2022 at 10:29 AM Evgenii Stepanov wrote: > > On Tue, Aug 9, 2022 at 9:49 AM Marc Zyngier wrote: > > > In which case what is the tag memory doing in the linear map? > > > Shouldn't it be marked as reserved, not mapped, and in general > > > completely ignored by the NS OS? > > > > That would be wasteful. The idea is to only reserve the parts of the > > tag memory that correspond to the TZ carveout and release the rest to > > the NS OS. > > More generally, one can imagine a system where *any* tagged memory > transaction can result in an SError because the MTE implementation was > not configured by an earlier bootloader phase, e.g. because the > bootloader was configured to disable MTE at runtime. On such systems, > the kernel must refrain from causing tagged memory transactions to be > issued via the linear map, and that's exactly what this patch does. The problem is that it doesn't. The 8.5 architecture allows any Normal Cacheable (even non-tagged) mapping to fetch tags. It may happen that on certain implementations setting MAIR to non-tagged works but that's not guaranteed and with the Linux kernel we tend to stick to the architected behaviour (with a few exceptions like PMU counters and errata). There is an ongoing discussion with the architects and partners on whether we can tighten the architecture as not to cause visible side-effects like SError but not sure whether that has been closed yet (just back from holiday). Until that's sorted, tag storage cannot be reused in an arm64-generic way in the kernel. -- Catalin