All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Implement a bit of bw_state readout
Date: Thu, 25 Aug 2022 10:54:48 +0300	[thread overview]
Message-ID: <YwcqyKdjSdDZmx0c@intel.com> (raw)
In-Reply-To: <20220617160730.10981-1-ville.syrjala@linux.intel.com>

On Fri, Jun 17, 2022 at 07:07:30PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We currently fail to reconstruct the bw related cdclk limits
> during readout, which triggers a  cdclk reclaculation during
> fastboot, which is then likely forces a full modeset anyway.
> Reconstruct some of the missing state so that we can skip
> the cdclk recomputation and thus have a higher chance for
> flicker free boot.

Problem is that intel_bw_min_cdclk is using intel_bw_dbuf_min_cdclk,
which in turns relies that bw_state->dbuf_bw was already calculated,
however this is calculated in intel_bw_calc_min_cdclk, which is called
from intel_cdclk_atomic_check.

So wondering will that work?

Stan

> 
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c      | 9 ++++++---
>  drivers/gpu/drm/i915/display/intel_display.c | 7 +++++--
>  2 files changed, 11 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 79269d2c476b..30ffec63f9a3 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -627,11 +627,14 @@ void intel_bw_crtc_update(struct intel_bw_state *bw_state,
>  		intel_bw_crtc_data_rate(crtc_state);
>  	bw_state->num_active_planes[crtc->pipe] =
>  		intel_bw_crtc_num_active_planes(crtc_state);
> +	bw_state->min_cdclk[crtc->pipe] =
> +		intel_bw_crtc_min_cdclk(crtc_state);
>  
> -	drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n",
> -		    pipe_name(crtc->pipe),
> +	drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] data rate %u num active planes %u min cdclk %d kHz\n",
> +		    crtc->base.base.id, crtc->base.name,
>  		    bw_state->data_rate[crtc->pipe],
> -		    bw_state->num_active_planes[crtc->pipe]);
> +		    bw_state->num_active_planes[crtc->pipe],
> +		    bw_state->min_cdclk[crtc->pipe]);
>  }
>  
>  static unsigned int intel_bw_num_active_planes(struct drm_i915_private *dev_priv,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 90bd26431e31..b17b9493c68f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2498,6 +2498,7 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc,
>  
>  	bw_state->data_rate[pipe] = 0;
>  	bw_state->num_active_planes[pipe] = 0;
> +	bw_state->min_cdclk[pipe] = 0;
>  }
>  
>  /*
> @@ -9310,6 +9311,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  		to_intel_cdclk_state(dev_priv->cdclk.obj.state);
>  	struct intel_dbuf_state *dbuf_state =
>  		to_intel_dbuf_state(dev_priv->dbuf.obj.state);
> +	struct intel_bw_state *bw_state =
> +		to_intel_bw_state(dev_priv->bw_obj.state);
>  	enum pipe pipe;
>  	struct intel_crtc *crtc;
>  	struct intel_encoder *encoder;
> @@ -9425,8 +9428,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  	drm_connector_list_iter_end(&conn_iter);
>  
>  	for_each_intel_crtc(dev, crtc) {
> -		struct intel_bw_state *bw_state =
> -			to_intel_bw_state(dev_priv->bw_obj.state);
>  		struct intel_crtc_state *crtc_state =
>  			to_intel_crtc_state(crtc->base.state);
>  		struct intel_plane *plane;
> @@ -9490,6 +9491,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  
>  		intel_bw_crtc_update(bw_state, crtc_state);
>  	}
> +
> +	cdclk_state->bw_min_cdclk = intel_bw_min_cdclk(dev_priv, bw_state);
>  }
>  
>  static void
> -- 
> 2.35.1
> 

  parent reply	other threads:[~2022-08-25  7:54 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-17 16:07 [Intel-gfx] [PATCH] drm/i915: Implement a bit of bw_state readout Ville Syrjala
2022-06-17 19:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2022-06-18  9:18 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-08-25  7:54 ` Lisovskiy, Stanislav [this message]
2022-08-25  8:49   ` [Intel-gfx] [PATCH] " Ville Syrjälä

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YwcqyKdjSdDZmx0c@intel.com \
    --to=stanislav.lisovskiy@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.