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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 7/9] drm/i915/dp: Replace intel_dp.dfp members with the new crtc_state dp_dfp members
Date: Mon, 12 Sep 2022 21:56:57 +0300	[thread overview]
Message-ID: <Yx+A+XHRzxJevOKr@intel.com> (raw)
In-Reply-To: <20220901060101.1000290-8-ankit.k.nautiyal@intel.com>

On Thu, Sep 01, 2022 at 11:30:59AM +0530, Ankit Nautiyal wrote:
> The decision to use DFP output format conversion capabilities should be
> during compute_config phase.
> 
> This patch uses the members of intel_dp->dfp to only store the
> format conversion capabilities of the DP device and uses the crtc_state
> dp_dfp members that are computed earlier, to program the
> protocol-converter for colorspace/format conversion.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 46 +++++++++----------------
>  1 file changed, 17 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f3c2aeda0c1d..409bd9cdf450 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -805,6 +805,7 @@ intel_dp_output_format(struct intel_connector *connector,
>  		       bool ycbcr_420_output)
>  {
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  
>  	if (!connector->base.ycbcr_420_allowed || !ycbcr_420_output)
>  		return INTEL_OUTPUT_FORMAT_RGB;
> @@ -813,6 +814,10 @@ intel_dp_output_format(struct intel_connector *connector,
>  	    intel_dp->dfp.ycbcr_444_to_420)
>  		return INTEL_OUTPUT_FORMAT_RGB;
>  
> +	/* Prefer 4:2:0 passthrough over 4:4:4->4:2:0 conversion */
> +	if (DISPLAY_VER(i915) >= 11 && intel_dp->dfp.ycbcr420_passthrough)
> +		return INTEL_OUTPUT_FORMAT_YCBCR420;
> +
>  	if (intel_dp->dfp.ycbcr_444_to_420)
>  		return INTEL_OUTPUT_FORMAT_YCBCR444;
>  	else
> @@ -2698,8 +2703,8 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
>  		drm_dbg_kms(&i915->drm, "Failed to %s protocol converter HDMI mode\n",
>  			    str_enable_disable(intel_dp->has_hdmi_sink));
>  
> -	tmp = crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 &&
> -		intel_dp->dfp.ycbcr_444_to_420 ? DP_CONVERSION_TO_YCBCR420_ENABLE : 0;
> +	tmp = crtc_state->dp_dfp_config.ycbcr_444_to_420 ?
> +		DP_CONVERSION_TO_YCBCR420_ENABLE : 0;
>  
>  	if (drm_dp_dpcd_writeb(&intel_dp->aux,
>  			       DP_PROTOCOL_CONVERTER_CONTROL_1, tmp) != 1)
> @@ -2707,7 +2712,7 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
>  			    "Failed to %s protocol converter YCbCr 4:2:0 conversion mode\n",
>  			    str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
>  
> -	tmp = intel_dp->dfp.rgb_to_ycbcr ?
> +	tmp = crtc_state->dp_dfp_config.rgb_to_ycbcr ?
>  		DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
>  
>  	if (drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp) < 0)
> @@ -4563,7 +4568,7 @@ intel_dp_update_420(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  	struct intel_connector *connector = intel_dp->attached_connector;
> -	bool is_branch, ycbcr_420_passthrough, ycbcr_444_to_420, rgb_to_ycbcr;
> +	bool is_branch;
>  
>  	/* No YCbCr output support on gmch platforms */
>  	if (HAS_GMCH(i915))
> @@ -4577,38 +4582,21 @@ intel_dp_update_420(struct intel_dp *intel_dp)
>  		return;
>  
>  	is_branch = drm_dp_is_branch(intel_dp->dpcd);
> -	ycbcr_420_passthrough =
> +	intel_dp->dfp.ycbcr420_passthrough =
>  		drm_dp_downstream_420_passthrough(intel_dp->dpcd,
>  						  intel_dp->downstream_ports);
>  	/* on-board LSPCON always assumed to support 4:4:4->4:2:0 conversion */
> -	ycbcr_444_to_420 =
> +	intel_dp->dfp.ycbcr_444_to_420 =
>  		dp_to_dig_port(intel_dp)->lspcon.active ||
>  		drm_dp_downstream_444_to_420_conversion(intel_dp->dpcd,
>  							intel_dp->downstream_ports);
> -	rgb_to_ycbcr = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
> -								 intel_dp->downstream_ports,
> -								 DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
> -
> -	if (DISPLAY_VER(i915) >= 11) {
> -		/* Let PCON convert from RGB->YCbCr if possible */
> -		if (is_branch && rgb_to_ycbcr && ycbcr_444_to_420) {
> -			intel_dp->dfp.rgb_to_ycbcr = true;
> -			intel_dp->dfp.ycbcr_444_to_420 = true;
> -			connector->base.ycbcr_420_allowed = true;
> -		} else {
> -		/* Prefer 4:2:0 passthrough over 4:4:4->4:2:0 conversion */
> -			intel_dp->dfp.ycbcr_444_to_420 =
> -				ycbcr_444_to_420 && !ycbcr_420_passthrough;
> +	intel_dp->dfp.rgb_to_ycbcr =
> +		drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
> +							  intel_dp->downstream_ports,
> +							  DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
>  
> -			connector->base.ycbcr_420_allowed =
> -				!is_branch || ycbcr_444_to_420 || ycbcr_420_passthrough;
> -		}
> -	} else {
> -		/* 4:4:4->4:2:0 conversion is the only way */
> -		intel_dp->dfp.ycbcr_444_to_420 = ycbcr_444_to_420;
> -
> -		connector->base.ycbcr_420_allowed = ycbcr_444_to_420;
> -	}
> +	if (!is_branch || intel_dp->dfp.ycbcr420_passthrough || intel_dp->dfp.ycbcr_444_to_420)
> +		connector->base.ycbcr_420_allowed = true;

That part looks wrong for pre-icl now. They can't do the 4:2:0
passthrough.

>  
>  	drm_dbg_kms(&i915->drm,
>  		    "[CONNECTOR:%d:%s] RGB->YcbCr conversion? %s, YCbCr 4:2:0 allowed? %s, YCbCr 4:4:4->4:2:0 conversion? %s\n",
> -- 
> 2.25.1

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2022-09-12 18:57 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-01  6:00 [Intel-gfx] [PATCH v2 0/9] Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 1/9] drm/i915/dp: Reset frl trained flag before restarting FRL training Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 2/9] drm/i915/dp: Add RGB to YCBCR conversion case in is_dp_ycbcr420 helper Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 3/9] drm/i915/dp: Remove whitespace at the end of function Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 4/9] drm/i915/display: Add new members to configure PCON color conversion Ankit Nautiyal
2022-09-12 18:55   ` Ville Syrjälä
2022-09-13  5:25     ` Nautiyal, Ankit K
2022-09-13  8:15       ` Ville Syrjälä
2022-09-13 10:27         ` Nautiyal, Ankit K
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 5/9] drm/i915/dp: Compute configuration for using PCON's color/format conversion Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 6/9] drm/i915/dp: Use crtc_state members in dp_is_ycbcr420 Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 7/9] drm/i915/dp: Replace intel_dp.dfp members with the new crtc_state dp_dfp members Ankit Nautiyal
2022-09-12 18:56   ` Ville Syrjälä [this message]
2022-09-13  6:13     ` Nautiyal, Ankit K
2022-10-17 10:49       ` Nautiyal, Ankit K
2022-09-01  6:01 ` [Intel-gfx] [PATCH v2 8/9] drm/i915/dp: Handle BPP where HDMI2.1 DFP doesn't support DSC Ankit Nautiyal
2022-09-01  6:01 ` [Intel-gfx] [PATCH v2 9/9] drm/i915/dp: Fix FRL BW check for HDMI2.1 DFP Ankit Nautiyal
2022-09-01  6:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev2) Patchwork
2022-09-01  6:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-01 20:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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