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From: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Christoph Hellwig <hch@lst.de>,
	linux-arm-kernel@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	Ard Biesheuvel <ardb@kernel.org>
Subject: Re: [PATCH] arm64: dma: Drop cache invalidation from arch_dma_prep_coherent()
Date: Thu, 8 Sep 2022 16:49:03 +0100	[thread overview]
Message-ID: <YxoO7xmB24/bpycc@arm.com> (raw)
In-Reply-To: <YxnEr8k5Sq1dZFnu@arm.com>

On Thu, Sep 08, 2022 at 11:32:15AM +0100, Catalin Marinas wrote:
> On Wed, Sep 07, 2022 at 05:25:43PM +0100, Will Deacon wrote:
> > On Wed, Sep 07, 2022 at 10:27:45AM +0100, Robin Murphy wrote:
> > > It seems like we don't stand to gain much by removing the invalidation -
> > > since the overhead will still be in the clean - other than the potential for
> > > a slightly increased chance of rare and hard-to-debug memory corruption :/
> > 
> > I just find it odd that we rely on the CPU not hitting the cacheable alias
> > in other places, yet we're using an invalidation for this path. It's
> > inconsistent and difficult to explain to people. As I said, I'm happy to
> > add a comment to the existing code instead of the change here, but I don't
> > know what to say other than something like:
> > 
> >   /*
> >    * The architecture says we only need a clean here, but invalidate as
> >    * well just in case.
> >    */
[...]
> So yeah, I think a clean is needed here or clean+invalidate but not
> invalidate only due to the addition of MTE.

OK, I think invalidate works as well. The ARM ARM has a note on the DC
IVAC instruction:

  When FEAT_MTE is implemented, this instruction might invalidate
  Allocation Tags from caches. When it invalidates Allocation Tags from
  caches, it also cleans them.

(hopefully it cleans them first before invalidating)

-- 
Catalin

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  parent reply	other threads:[~2022-09-08 15:52 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-23 12:21 [PATCH] arm64: dma: Drop cache invalidation from arch_dma_prep_coherent() Will Deacon
2022-08-24  9:58 ` Ard Biesheuvel
2022-08-24 11:23   ` Will Deacon
2022-08-24 11:49     ` Ard Biesheuvel
2022-08-24 22:00 ` Catalin Marinas
2022-09-07  9:04   ` Christoph Hellwig
2022-09-07 14:10     ` Russell King (Oracle)
2022-09-07 14:14       ` Christoph Hellwig
2022-09-07 14:15         ` Russell King (Oracle)
2022-09-07  9:03 ` Christoph Hellwig
2022-09-07  9:27   ` Robin Murphy
2022-09-07 16:25     ` Will Deacon
2022-09-07 17:50       ` Robin Murphy
2022-09-08 10:32       ` Catalin Marinas
2022-09-08 11:32         ` Robin Murphy
2022-09-08 13:02           ` Catalin Marinas
2022-09-08 13:27             ` Catalin Marinas
2022-09-08 13:32               ` Will Deacon
2022-09-08 15:49         ` Catalin Marinas [this message]
2022-09-07 16:28   ` Will Deacon
2022-09-22 20:02 ` Catalin Marinas

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