From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D4980C6FA8A for ; Thu, 8 Sep 2022 15:52:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AzGeoFemppw7m7u5K5+khQDlUdfIfrFQEb6WUcxudpE=; b=U7WtqD/NgueSV2 wcWr5chLfza9F2Tz7QvEivUsEo1FaOmi5LUOHYMewnnPSrzzJj8ARbHxjA77+DKiQZt1VbiOv+fwS Va1sUoEY24ZEbKplQrdB1ubEadvYQ/kcHY7lfDmup8h7/E70aQjE9+ZUHQUmkNxgtDR+yeY/p1c/5 /7q67DwU3dUswCL0fM3FqH3FgZl7kmtyFx0TxtcVgcJWjN7qGnym+7EvJH+70kOuyQtpGMxJwwLdx D3TX9kQ4eYf1O1c6PKKNm7lBg7FAjv0A70UFYGw4fH413YHPdVaych3trdgeKAOuMGjuUr4LNzmiD L/e97LWjanFo5P5CdHeQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWJoL-005QEO-BJ; Thu, 08 Sep 2022 15:51:25 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWJm9-005OrI-Vs for linux-arm-kernel@lists.infradead.org; Thu, 08 Sep 2022 15:49:11 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id EDF2F61D3A; Thu, 8 Sep 2022 15:49:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3625FC433C1; Thu, 8 Sep 2022 15:49:07 +0000 (UTC) Date: Thu, 8 Sep 2022 16:49:03 +0100 From: Catalin Marinas To: Will Deacon Cc: Robin Murphy , Christoph Hellwig , linux-arm-kernel@lists.infradead.org, Mark Rutland , Ard Biesheuvel Subject: Re: [PATCH] arm64: dma: Drop cache invalidation from arch_dma_prep_coherent() Message-ID: References: <20220823122111.17439-1-will@kernel.org> <20220907090305.GA30704@lst.de> <5d856574-4cd7-70d0-adcb-3e284fef315f@arm.com> <20220907162543.GA30558@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220908_084910_107393_C6504D24 X-CRM114-Status: GOOD ( 23.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Sep 08, 2022 at 11:32:15AM +0100, Catalin Marinas wrote: > On Wed, Sep 07, 2022 at 05:25:43PM +0100, Will Deacon wrote: > > On Wed, Sep 07, 2022 at 10:27:45AM +0100, Robin Murphy wrote: > > > It seems like we don't stand to gain much by removing the invalidation - > > > since the overhead will still be in the clean - other than the potential for > > > a slightly increased chance of rare and hard-to-debug memory corruption :/ > > > > I just find it odd that we rely on the CPU not hitting the cacheable alias > > in other places, yet we're using an invalidation for this path. It's > > inconsistent and difficult to explain to people. As I said, I'm happy to > > add a comment to the existing code instead of the change here, but I don't > > know what to say other than something like: > > > > /* > > * The architecture says we only need a clean here, but invalidate as > > * well just in case. > > */ [...] > So yeah, I think a clean is needed here or clean+invalidate but not > invalidate only due to the addition of MTE. OK, I think invalidate works as well. The ARM ARM has a note on the DC IVAC instruction: When FEAT_MTE is implemented, this instruction might invalidate Allocation Tags from caches. When it invalidates Allocation Tags from caches, it also cleans them. (hopefully it cleans them first before invalidating) -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel