From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Jouni Högander" <jouni.hogander@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 0/2] drm/i915/psr: Disable PSR2 when SDP is sent on prior line
Date: Tue, 13 Sep 2022 12:14:13 +0300 [thread overview]
Message-ID: <YyBJ5eObrFONkc1k@intel.com> (raw)
In-Reply-To: <20220905102355.176622-1-jouni.hogander@intel.com>
On Mon, Sep 05, 2022 at 01:23:53PM +0300, Jouni Högander wrote:
> Selective update doesn't work if SU start address is 0 and start/end
> SDP is configured to be sent prior to SU start/end lines. PSR2 has to
> be disabled in this case for Alder Lake.
>
> Additionally this patch set updates changed equation for sending
> start/end SDP prior to the SU region start/end.
>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
>
> Jouni Högander (2):
> drm/i915/psr: Equation changed for sending start/stop on prior line
> drm/i915/psr: Disable PSR2 when SDP is sent on prior line
Series pushed to drm-intel-next. Thanks.
>
> drivers/gpu/drm/i915/display/intel_psr.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> --
> 2.34.1
--
Ville Syrjälä
Intel
prev parent reply other threads:[~2022-09-13 9:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-05 10:23 [Intel-gfx] [PATCH 0/2] drm/i915/psr: Disable PSR2 when SDP is sent on prior line Jouni Högander
2022-09-05 10:23 ` [Intel-gfx] [PATCH 1/2] drm/i915/psr: Equation changed for sending start/stop " Jouni Högander
2022-09-06 9:15 ` Kahola, Mika
2022-09-05 10:23 ` [Intel-gfx] [PATCH 2/2] drm/i915/psr: Disable PSR2 when SDP is sent " Jouni Högander
2022-09-06 9:16 ` Kahola, Mika
2022-09-05 11:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2022-09-05 15:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-09-13 9:14 ` Ville Syrjälä [this message]
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