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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Srivatsa, Anusha" <anusha.srivatsa@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
Date: Wed, 21 Sep 2022 00:59:00 +0300	[thread overview]
Message-ID: <Yyo3pJ4QD9O4Iv6N@intel.com> (raw)
In-Reply-To: <CY4PR1101MB21666FC6A193F1FDA0B2A96BF84C9@CY4PR1101MB2166.namprd11.prod.outlook.com>

On Tue, Sep 20, 2022 at 06:48:46PM +0000, Srivatsa, Anusha wrote:
> 
> 
> > -----Original Message-----
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Sent: Tuesday, September 20, 2022 1:20 AM
> > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > 
> > On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> > > This is a prep series for the actual cdclk refactoring that will be
> > > sent following this. Idea is to have a struct - cdclk_step that holds
> > > the following:
> > > - cdclk action (squash, crawl or modeset)
> > > - cdclk frequency
> > > which gets populated in atomic check. Driver uses the populated values
> > > during atomic commit to do the suitable sequence of actions like
> > > programming squash ctl registers in case of squashing or PLL sequence
> > > incase of modeset and so on.
> > >
> > > This series just addresses the initial idea. The actual plumming in
> > > the atomic commit phase will be sent shortly.
> > 
> > OK, people keep ignoring what I say so I just typed up the code quickly. This
> > to me seems like the most straightforward way to do what we need:
> > https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
> > 
> > Totally untested ofc, apart from me doing a quick scan through our cdclk
> > tables for the crawl+squahs platforms to make sure that this approach
> > should produce sane values.
> Ville,
> Why have a mid cdclk_config? Cant we use the new-cdclk-config for this purpose?

You either
- start at old, crawl to mid, then squash to new
- start at old, squash to mid, then crawl to new

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2022-09-20 21:59 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-17  0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
2022-09-17  0:43 ` [Intel-gfx] [PATCH 1/6] drm/i915/display Add dg2_prog_squash_ctl() helper Anusha Srivatsa
2022-09-17  0:44 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config Anusha Srivatsa
2022-09-19  9:26   ` Jani Nikula
2022-09-19 19:32     ` Navare, Manasi
2022-09-19 22:42       ` Srivatsa, Anusha
2022-09-20  6:55         ` Jani Nikula
2022-09-17  0:44 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing Anusha Srivatsa
2022-09-19  9:27   ` Jani Nikula
2022-09-19 19:39     ` Navare, Manasi
2022-09-19 22:54       ` Srivatsa, Anusha
2022-09-17  0:44 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Embed the new struct steps for crawling Anusha Srivatsa
2022-09-19  9:28   ` Jani Nikula
2022-09-17  0:44 ` [Intel-gfx] [PATCH 5/6] drm/i915/display: Embed the new struct steps for modeset Anusha Srivatsa
2022-09-17  0:44 ` [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values Anusha Srivatsa
2022-09-19 19:46   ` Navare, Manasi
2022-09-19 21:10     ` Rodrigo Vivi
2022-09-19 22:35       ` Navare, Manasi
2022-09-20  7:27   ` Jani Nikula
2022-09-20 18:47     ` Srivatsa, Anusha
2022-09-17  1:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce struct cdclk_step Patchwork
2022-09-17  1:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-17  1:35 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-09-17  2:08   ` Dixit, Ashutosh
2022-09-19  6:35     ` Vudum, Lakshminarayana
2022-09-19 16:33       ` Dixit, Ashutosh
2022-09-19  4:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-19  5:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-09-19  6:25 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2022-09-19 19:48 ` [Intel-gfx] [PATCH 0/6] " Navare, Manasi
2022-09-20  8:20 ` Ville Syrjälä
2022-09-20 18:48   ` Srivatsa, Anusha
2022-09-20 21:59     ` Ville Syrjälä [this message]
2022-09-23 16:56       ` Srivatsa, Anusha
2022-09-23 19:04         ` Ville Syrjälä
2022-09-26 17:21           ` Srivatsa, Anusha
2022-09-26 17:29             ` Ville Syrjälä
2022-09-26 17:55               ` Srivatsa, Anusha

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