From: William Breathitt Gray <william.gray@linaro.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: "Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Lee Jones" <lee@kernel.org>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
linux-pwm@vger.kernel.org, linux-iio@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
"Chris Paterson" <Chris.Paterson2@renesas.com>,
"Biju Das" <biju.das@bp.renesas.com>,
"Prabhakar Mahadev Lad" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH RFC 0/8] Add RZ/G2L MTU3a MFD and Counter driver
Date: Tue, 27 Sep 2022 18:05:40 -0400 [thread overview]
Message-ID: <YzNztKSYQPQrnV7k@fedora> (raw)
In-Reply-To: <20220926132114.60396-1-biju.das.jz@bp.renesas.com>
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On Mon, Sep 26, 2022 at 02:21:06PM +0100, Biju Das wrote:
> The RZ/G2L multi-function timer pulse unit 3 (MTU3a) is embedded in
> the Renesas RZ/G2L family SoC's. It consists of eight 16-bit timer
> channels and one 32-bit timer channel. It supports the following
> functions
> - Counter
> - Timer
> - PWM
>
> This patch series aim to add MFD and counter driver for MTU3a.
> Subsequent patch seies will add TImer and PWM driver support
> also enhancements to counter driver.
Hello Biju,
I see this device consists of several channels, but only one Count is
defined in the counter patch ("Channel 1 Count"). Do all channels
support counting, or is it limited to just one channel?
Thanks,
William Breathitt Gray
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next prev parent reply other threads:[~2022-09-27 22:06 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-26 13:21 [PATCH RFC 0/8] Add RZ/G2L MTU3a MFD and Counter driver Biju Das
2022-09-26 13:21 ` [PATCH RFC 1/8] clk: renesas: r9a07g044: Add MTU3a clock and reset entry Biju Das
2022-09-26 13:21 ` [PATCH RFC 2/8] dt-bindings: mfd: Document RZ/G2L MTU3a bindings Biju Das
2022-10-03 7:50 ` Krzysztof Kozlowski
2022-10-03 8:18 ` Biju Das
2022-09-26 13:21 ` [PATCH RFC 3/8] mfd: Add RZ/G2L MTU3 driver Biju Das
2022-09-26 14:24 ` Philipp Zabel
2022-09-27 5:37 ` Biju Das
2022-09-26 13:21 ` [PATCH RFC 4/8] dt-bindings: mfd: rzg2l-mtu3: Document RZ/G2UL MTU3 counter Biju Das
2022-10-03 7:53 ` Krzysztof Kozlowski
2022-10-03 8:25 ` Biju Das
2022-09-26 13:21 ` [PATCH RFC 5/8] counter: Add RZ/G2L MTU3 counter driver Biju Das
2022-10-01 0:22 ` William Breathitt Gray
2022-10-05 10:29 ` Biju Das
2022-09-26 13:21 ` [PATCH RFC 6/8] arm64: dts: renesas: r9a07g044: Add MTU3a node Biju Das
2022-09-26 13:21 ` [PATCH RFC 7/8] arm64: dts: renesas: r9a07g054: " Biju Das
2022-09-26 13:21 ` [PATCH RFC 8/8] arm64: dts: renesas: rzg2l-smarc: [HACK] Enable MTU for 16-bit phase count testing Biju Das
2022-09-27 22:05 ` William Breathitt Gray [this message]
2022-09-28 6:14 ` [PATCH RFC 0/8] Add RZ/G2L MTU3a MFD and Counter driver Biju Das
2022-09-30 22:57 ` William Breathitt Gray
2022-10-01 16:45 ` Biju Das
2022-10-01 17:05 ` William Breathitt Gray
2022-10-01 17:12 ` Biju Das
2022-10-01 17:43 ` William Breathitt Gray
2022-10-01 18:03 ` Biju Das
2022-10-01 18:34 ` William Breathitt Gray
2022-10-01 18:51 ` Biju Das
2022-10-01 19:04 ` William Breathitt Gray
2022-10-01 19:21 ` Biju Das
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