Re: [PATCH net v2 1/7] net: hibmcge: fix incorrect pause frame statistics issue

[Michal Swiatkowski <michal.swiatkowski@linux.intel.com>]

On Thu, Apr 03, 2025 at 09:53:05PM +0800, Jijie Shao wrote:
> The driver supports pause frames,
> but does not pass pause frames based on rx pause enable configuration,
> resulting in incorrect pause frame statistics.
> 
> like this:
> mz eno3 '01 80 c2 00 00 01 00 18 2d 04 00 9c 88 08 00 01 ff ff' \
> 	-p 64 -c 100
> 
> ethtool -S enp132s0f2 | grep -v ": 0"
> NIC statistics:
>      rx_octets_total_filt_cnt: 6800
>      rx_filt_pkt_cnt: 100
> 
> The rx pause frames are filtered by the MAC hardware.
> 
> This patch configures pass pause frames based on the
> rx puase enable status to ensure that
> rx pause frames are not filtered.
> 
> mz eno3 '01 80 c2 00 00 01 00 18 2d 04 00 9c 88 08 00 01 ff ff' \
>         -p 64 -c 100
> 
> ethtool --include-statistics -a enp132s0f2
> Pause parameters for enp132s0f2:
> Autonegotiate:	on
> RX:		on
> TX:		on
> RX negotiated: on
> TX negotiated: on
> Statistics:
>   tx_pause_frames: 0
>   rx_pause_frames: 100
> 
> Fixes: 3a03763f3876 ("net: hibmcge: Add pauseparam supported in this module")
> Signed-off-by: Jijie Shao <shaojijie@huawei.com>
> ---
> ChangeLog:
> v1 -> v2:
>   - Add more details in commit log, suggested by Simon Horman.
>   v1: https://lore.kernel.org/all/20250402133905.895421-1-shaojijie@huawei.com/
> ---
>  drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c  | 3 +++
>  drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h | 1 +
>  2 files changed, 4 insertions(+)
> 
> diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c
> index 74a18033b444..7d3bbd3e2adc 100644
> --- a/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c
> +++ b/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c
> @@ -242,6 +242,9 @@ void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en)
>  			    HBG_REG_PAUSE_ENABLE_TX_B, tx_en);
>  	hbg_reg_write_field(priv, HBG_REG_PAUSE_ENABLE_ADDR,
>  			    HBG_REG_PAUSE_ENABLE_RX_B, rx_en);
> +
> +	hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,
> +			    HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B, rx_en);
>  }
>  
>  void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en)
> diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
> index cc2cc612770d..fd623cfd13de 100644
> --- a/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
> +++ b/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
> @@ -68,6 +68,7 @@
>  #define HBG_REG_TRANSMIT_CTRL_AN_EN_B		BIT(5)
>  #define HBG_REG_REC_FILT_CTRL_ADDR		(HBG_REG_SGMII_BASE + 0x0064)
>  #define HBG_REG_REC_FILT_CTRL_UC_MATCH_EN_B	BIT(0)
> +#define HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B	BIT(4)
>  #define HBG_REG_RX_OCTETS_TOTAL_OK_ADDR		(HBG_REG_SGMII_BASE + 0x0080)
>  #define HBG_REG_RX_OCTETS_BAD_ADDR		(HBG_REG_SGMII_BASE + 0x0084)
>  #define HBG_REG_RX_UC_PKTS_ADDR			(HBG_REG_SGMII_BASE + 0x0088)
> -- 

Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>

> 2.33.0