Re: [PATCH v4 3/3] iommu: Drop sw_msi from iommu_domain

[Nicolin Chen <nicolinc@nvidia.com>]

On Mon, Mar 24, 2025 at 01:43:52PM -0700, Nathan Chancellor wrote:
> On Mon, Mar 24, 2025 at 05:05:01PM -0300, Jason Gunthorpe wrote:
> > On Mon, Mar 24, 2025 at 10:07:43AM -0700, Nathan Chancellor wrote:
> > 
> > > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> > > index 0f4cc15ded1c..2b81166350ae 100644
> > > --- a/drivers/iommu/iommu.c
> > > +++ b/drivers/iommu/iommu.c
> > > @@ -3661,7 +3661,6 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr)
> > >  			ret = iommufd_sw_msi(group->domain, desc, msi_addr);
> > >  			break;
> > >  		default:
> > > -			ret = -EOPNOTSUPP;
> > >  			break;
> > >  		}
> > >  	}
> > 
> > Can we explain why this scenario has a 0 cookie_type?
> > 
> > Actually.. Is it just an identity domain? Nicolin did you test this on
> > your arm system with a device using identity (iommu=pt kernel param)?
> > I would expect identity to end up with a 0 cookie because we never
> > setup dma-iommu.c code on it.
> > 
> > Should we be testing for identity to return 0 instead?

My feeling is that we should just let all other cases return 0
like the previous function did, as this seems to be commonly on
the IRQ allocation path that shouldn't fail like this. E.g. if
we fail a blocked domain, would it retry switching domains?

> For the record, the particular system I noticed the issue on does need
> "iommu.passthrough=1" (which is the ARM equivalent to "iommu=pt" IIUC?)
> to boot due to a lack of firmware support for IORT RMR, so I think the
> answer to your first question is probably yes?

Yea, I confirmed that identity domain on ARM fails too. My bad
that I didn't catch this case.

Thanks
Nicolin