From: "Daniel P. Berrangé" <berrange@redhat.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: Andrea Bolognani <abologna@redhat.com>,
qemu-devel@nongnu.org, qemu-riscv <qemu-riscv@nongnu.org>,
Laurent Vivier <laurent@vivier.eu>,
David Abdurachmanov <davidlt@rivosinc.com>,
Richard Henderson <richard.henderson@linaro.org>,
Mark Corbin <mark@dibsco.co.uk>
Subject: Re: [PATCH] binfmt: Don't consider riscv{32,64} part of the same family
Date: Tue, 3 Dec 2024 10:18:38 +0000 [thread overview]
Message-ID: <Z07a_kYh4duwWKWw@redhat.com> (raw)
In-Reply-To: <cb079b65-e5fc-4667-aa63-9ff347666b6e@linaro.org>
On Tue, Dec 03, 2024 at 10:59:24AM +0100, Philippe Mathieu-Daudé wrote:
> Hi Andrea,
>
> On 3/12/24 10:47, Andrea Bolognani wrote:
> > Currently the script won't generate a configuration file that
> > sets up qemu-user-riscv32 on riscv64, likely under the
> > assumption that 64-bit RISC-V machines can natively run 32-bit
>
> I'm confused by the "machines" description used for user emulation.
It is referring to the host machines, being able (or not) to
run 32-bit usermode code on 64-bit host kernel.
>
> > RISC-V code.
> >
> > However this functionality, while theoretically possible, in
> > practice is missing from most commonly available RISC-V hardware
> > and not enabled at the distro level. So qemu-user-riscv32 really
> > is the only option to run riscv32 binaries on riscv64.
>
> We have definitions such ELF_ARCH/ELF_PLATFORM/ELF_MACHINE to
> parse ELF header and select the best CPU / flags. Maybe RISC-V
> lacks them?
Is that relevant, as we're not runing QEMU code at all in
the problematic scenario ?
Currently the script below will skip generating a binfmt
rule for riscv32, when on a riscv64 host. Thus qemu-riscv32
will never get called, and the kernel will try & fail to
run riscv32 binaries natively.
This change would make us generate riscv32 binfmt rules
and thus use qemu-riscv32 on riscv64 hosts for linux-user.
Separatley this from patch, we should also consider whether
it is time to do the same for aarch64/arm7.
If I look at this page:
https://gpages.juszkiewicz.com.pl/arm-socs-table/arm-socs.html
and sort by 'announced' to see msot recent CPUs first, then
almost all of them have "NO" in the "aarch32 support" column.
IOW, on modern aarch64 CPUs, qemu-arm is the only viable way
to run 32-bit usermode binaries AFAICT, and suggests we ought
to be creating a binfmt rule for that on aarch64 hosts.
> BTW we should expose that for linux-user as target_arch_elf.h,
> like bsd-user does, that would reduce all these #ifdef'ry in
> linux-user/elfload.c...
>
> >
> > Make riscv32 and riscv64 each its own family, so that the
> > configuration file we need to make 32-on-64 userspace emulation
> > work gets generated.
>
> Does this patch aim for 9.2? Otherwise FYI I'm working on unifying
> 32/64-bit targets, maybe for 10.0...
Well in Fedora we'll backport it to 9.2 at least, and from that
POV I'd consider it stable-9.2 material if accepted here.
> > Link: https://src.fedoraproject.org/rpms/qemu/pull-request/72
> > Thanks: David Abdurachmanov <davidlt@rivosinc.com>
> > Thanks: Daniel P. Berrangé <berrange@redhat.com>
> > Signed-off-by: Andrea Bolognani <abologna@redhat.com>
> > ---
> > scripts/qemu-binfmt-conf.sh | 7 ++-----
> > 1 file changed, 2 insertions(+), 5 deletions(-)
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
> >
> > diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh
> > index 6ef9f118d9..e38b767c24 100755
> > --- a/scripts/qemu-binfmt-conf.sh
> > +++ b/scripts/qemu-binfmt-conf.sh
> > @@ -110,11 +110,11 @@ hppa_family=hppa
> > riscv32_magic='\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\xf3\x00'
> > riscv32_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff'
> > -riscv32_family=riscv
> > +riscv32_family=riscv32
> > riscv64_magic='\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\xf3\x00'
> > riscv64_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff'
> > -riscv64_family=riscv
> > +riscv64_family=riscv64
> > xtensa_magic='\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x5e\x00'
> > xtensa_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff'
> > @@ -168,9 +168,6 @@ qemu_get_family() {
> > sparc*)
> > echo "sparc"
> > ;;
> > - riscv*)
> > - echo "riscv"
> > - ;;
> > loongarch*)
> > echo "loongarch"
> > ;;
>
With regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
next prev parent reply other threads:[~2024-12-03 10:19 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-03 9:47 [PATCH] binfmt: Don't consider riscv{32,64} part of the same family Andrea Bolognani
2024-12-03 9:59 ` Philippe Mathieu-Daudé
2024-12-03 10:12 ` [PATCH] binfmt: Don't consider riscv{32, 64} " Andrea Bolognani
2024-12-03 10:18 ` Daniel P. Berrangé [this message]
2024-12-03 10:35 ` Peter Maydell
2024-12-03 13:57 ` [PATCH] binfmt: Don't consider riscv{32,64} " Richard Henderson
2024-12-04 10:17 ` Daniel P. Berrangé
2024-12-05 17:15 ` Laurent Vivier
2024-12-04 10:03 ` Laurent Vivier
2025-01-02 16:02 ` [PATCH] binfmt: Don't consider riscv{32, 64} " Andrea Bolognani
2025-01-06 1:27 ` Alistair Francis
2025-01-06 11:47 ` Peter Maydell
2025-01-06 11:57 ` Daniel P. Berrangé
2025-01-06 12:01 ` Peter Maydell
2025-01-06 17:54 ` Andrea Bolognani
2025-01-07 1:29 ` Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Z07a_kYh4duwWKWw@redhat.com \
--to=berrange@redhat.com \
--cc=abologna@redhat.com \
--cc=davidlt@rivosinc.com \
--cc=laurent@vivier.eu \
--cc=mark@dibsco.co.uk \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.