From: Niklas Cassel <cassel@kernel.org>
To: Frank Li <Frank.li@nxp.com>
Cc: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Damien Le Moal" <dlemoal@kernel.org>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 2/2] misc: pci_endpoint_test: Add support for capabilities
Date: Mon, 25 Nov 2024 16:17:04 +0100 [thread overview]
Message-ID: <Z0SU8EpsTcYXqKJ_@ryzen> (raw)
In-Reply-To: <Zz+NV312ESzPdp/a@lizhi-Precision-Tower-5810>
On Thu, Nov 21, 2024 at 02:43:19PM -0500, Frank Li wrote:
> On Thu, Nov 21, 2024 at 04:23:21PM +0100, Niklas Cassel wrote:
> > The test BAR is on the EP side is allocated using pci_epf_alloc_space(),
> > which allocates the backing memory using dma_alloc_coherent(), which will
> > return zeroed memory regardless of __GFP_ZERO was set or not.
> >
> > This means that running a new version of pci-endpoint-test.c (host side)
> > with an old version of pci-epf-test.c (EP side) will not see any
> > capabilities being set (as intended), so this is backwards compatible.
> >
> > Additionally, the EP side always allocates at least 128 bytes for the test
> > BAR (excluding the MSI-X table), this means that adding another register at
> > offset 0x30 is still within the 128 available bytes.
> >
> > For now, we only add the CAP_UNALIGNED_ACCESS capability.
> >
> > If CAP_UNALIGNED_ACCESS is set, that means that the EP side supports
> > reading/writing to an address without any alignment requirements.
> >
> > Thus, if CAP_UNALIGNED_ACCESS is set, make sure that the host side does
> > not add any extra padding to the buffers that we allocate (which was only
> > done in order to get the buffers to satisfy certain alignment requirements
> > by the endpoint controller).
> >
> > Signed-off-by: Niklas Cassel <cassel@kernel.org>
>
> I think 4byte align for readl/writel still required?
I've been running this series on rk3588 (which has CAP_UNALIGNED_ACCESS set),
so alignment will be set to 0 in pci_endpoint_test_{copy,read,write}().
When running:
pcitest -r -s 1
pcitest -r -s 2
pcitest -r -s 3
pcitest -r -s 4
many, many times, and dma_alloc_coherent() always returned an address that
was 4 byte aligned, regardless of input size.
Additionally, when setting alignment to 0, the code in
pci_endpoint_test_{copy,read,write}() will behave exactly as it did before
the "alignment support" was added in commit:
https://github.com/torvalds/linux/commit/13107c60681f19fec25af93de86442ac9373e43f
So I think this patch is good as is.
Kind regards,
Niklas
>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> > ---
> > drivers/misc/pci_endpoint_test.c | 21 +++++++++++++++++++++
> > 1 file changed, 21 insertions(+)
> >
next prev parent reply other threads:[~2024-11-25 15:17 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-21 15:23 [PATCH v2 0/2] PCI endpoint test: Add support for capabilities Niklas Cassel
2024-11-21 15:23 ` [PATCH v2 1/2] PCI: endpoint: pci-epf-test: " Niklas Cassel
2024-11-21 19:38 ` Frank Li
2024-11-30 8:12 ` Manivannan Sadhasivam
2024-12-03 4:43 ` Niklas Cassel
2024-12-08 12:42 ` Manivannan Sadhasivam
2024-12-12 8:49 ` Niklas Cassel
2024-11-21 15:23 ` [PATCH v2 2/2] misc: pci_endpoint_test: " Niklas Cassel
2024-11-21 19:43 ` Frank Li
2024-11-25 15:17 ` Niklas Cassel [this message]
2024-11-30 8:21 ` Manivannan Sadhasivam
2024-12-03 4:48 ` Niklas Cassel
2024-11-26 13:20 ` [PATCH v2 0/2] PCI endpoint test: " Manivannan Sadhasivam
2024-11-27 11:23 ` Niklas Cassel
2024-11-27 11:32 ` Niklas Cassel
2024-11-27 11:55 ` Niklas Cassel
2024-11-27 11:40 ` Damien Le Moal
2024-11-30 8:05 ` Manivannan Sadhasivam
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