From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Matthew Auld <matthew.auld@intel.com>
Cc: intel-xe@lists.freedesktop.org,
"Matthew Brost" <matthew.brost@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Subject: Re: [PATCH 3/7] drm/xe: Add XE_BO_FLAG_PINNED_NORESTORE
Date: Mon, 16 Dec 2024 12:23:00 -0500 [thread overview]
Message-ID: <Z2Bh9IFKqkzCSvYy@intel.com> (raw)
In-Reply-To: <20241216162941.86070-10-matthew.auld@intel.com>
On Mon, Dec 16, 2024 at 04:29:44PM +0000, Matthew Auld wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> Not all BOs need to be restored on resume / d3cold exit, add
> XE_BO_FLAG_PINNED_NO_RESTORE which skips restoring of BOs rather just
> allocates VRAM for the BO. This should slightly speedup resume / d3cold
> exit flows.
>
> Marking GuC ADS, GuC CT, GuC log, GuC PC, and SA as NORESTORE.
>
> v2:
> - s/WONTNEED/NORESTORE (Vivi)
> - Rebase on newly added g2g and backup object flow
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_bo.c | 6 +++++-
> drivers/gpu/drm/xe/xe_bo.h | 9 +++++----
> drivers/gpu/drm/xe/xe_guc.c | 3 ++-
> drivers/gpu/drm/xe/xe_guc_ads.c | 3 ++-
> drivers/gpu/drm/xe/xe_guc_ct.c | 3 ++-
> drivers/gpu/drm/xe/xe_guc_log.c | 3 ++-
> drivers/gpu/drm/xe/xe_guc_pc.c | 3 ++-
> drivers/gpu/drm/xe/xe_sa.c | 3 ++-
> 8 files changed, 22 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index e95909963e06..f08b725dd419 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -860,6 +860,9 @@ int xe_bo_evict_pinned(struct xe_bo *bo)
> if (!xe_bo_is_vram(bo))
> goto out_unlock_bo;
>
> + if (bo->flags & XE_BO_FLAG_PINNED_NORESTORE)
> + goto out_unlock_bo;
> +
> backup = xe_bo_create_locked(xe, NULL, NULL, bo->size, ttm_bo_type_kernel,
> XE_BO_FLAG_SYSTEM | XE_BO_FLAG_NEEDS_CPU_ACCESS | XE_BO_FLAG_PINNED);
> if (IS_ERR(backup)) {
> @@ -1804,7 +1807,8 @@ int xe_managed_bo_reinit_in_vram(struct xe_device *xe, struct xe_tile *tile, str
> struct xe_bo *bo;
> u32 dst_flags = XE_BO_FLAG_VRAM_IF_DGFX(tile) | XE_BO_FLAG_GGTT;
>
> - dst_flags |= (*src)->flags & XE_BO_FLAG_GGTT_INVALIDATE;
> + dst_flags |= (*src)->flags & (XE_BO_FLAG_GGTT_INVALIDATE |
> + XE_BO_FLAG_PINNED_NORESTORE);
>
> xe_assert(xe, IS_DGFX(xe));
> xe_assert(xe, !(*src)->vmap.is_iomem);
> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> index a0ac2b9c903d..d75740b6e0a5 100644
> --- a/drivers/gpu/drm/xe/xe_bo.h
> +++ b/drivers/gpu/drm/xe/xe_bo.h
> @@ -39,10 +39,11 @@
> #define XE_BO_FLAG_NEEDS_64K BIT(15)
> #define XE_BO_FLAG_NEEDS_2M BIT(16)
> #define XE_BO_FLAG_GGTT_INVALIDATE BIT(17)
> -#define XE_BO_FLAG_GGTT0 BIT(18)
> -#define XE_BO_FLAG_GGTT1 BIT(19)
> -#define XE_BO_FLAG_GGTT2 BIT(20)
> -#define XE_BO_FLAG_GGTT3 BIT(21)
> +#define XE_BO_FLAG_PINNED_NORESTORE BIT(18)
> +#define XE_BO_FLAG_GGTT0 BIT(19)
> +#define XE_BO_FLAG_GGTT1 BIT(20)
> +#define XE_BO_FLAG_GGTT2 BIT(21)
> +#define XE_BO_FLAG_GGTT3 BIT(22)
> #define XE_BO_FLAG_GGTT_ALL (XE_BO_FLAG_GGTT0 | \
> XE_BO_FLAG_GGTT1 | \
> XE_BO_FLAG_GGTT2 | \
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 4e2868efb620..2fec35a81afd 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -453,7 +453,8 @@ static int guc_g2g_alloc(struct xe_guc *guc)
> XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> XE_BO_FLAG_GGTT |
> XE_BO_FLAG_GGTT_ALL |
> - XE_BO_FLAG_GGTT_INVALIDATE);
> + XE_BO_FLAG_GGTT_INVALIDATE |
> + XE_BO_FLAG_PINNED_NORESTORE);
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index 943146e5b460..887181c5395c 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -413,7 +413,8 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
> bo = xe_managed_bo_create_pin_map(xe, tile, guc_ads_size(ads) + MAX_GOLDEN_LRC_SIZE,
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> - XE_BO_FLAG_GGTT_INVALIDATE);
> + XE_BO_FLAG_GGTT_INVALIDATE |
> + XE_BO_FLAG_PINNED_NORESTORE);
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> index 7d33f3a11e61..390598babae9 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -238,7 +238,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
> bo = xe_managed_bo_create_pin_map(xe, tile, guc_ct_size(),
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> - XE_BO_FLAG_GGTT_INVALIDATE);
> + XE_BO_FLAG_GGTT_INVALIDATE |
> + XE_BO_FLAG_PINNED_NORESTORE);
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
> index df4cfb698cdb..88e4348204a0 100644
> --- a/drivers/gpu/drm/xe/xe_guc_log.c
> +++ b/drivers/gpu/drm/xe/xe_guc_log.c
> @@ -261,7 +261,8 @@ int xe_guc_log_init(struct xe_guc_log *log)
> bo = xe_managed_bo_create_pin_map(xe, tile, guc_log_size(),
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> - XE_BO_FLAG_GGTT_INVALIDATE);
> + XE_BO_FLAG_GGTT_INVALIDATE |
> + XE_BO_FLAG_PINNED_NORESTORE);
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index e8b9faeaef64..7c7f04f0d574 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -1086,7 +1086,8 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
> bo = xe_managed_bo_create_pin_map(xe, tile, size,
> XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> XE_BO_FLAG_GGTT |
> - XE_BO_FLAG_GGTT_INVALIDATE);
> + XE_BO_FLAG_GGTT_INVALIDATE |
> + XE_BO_FLAG_PINNED_NORESTORE);
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_sa.c b/drivers/gpu/drm/xe/xe_sa.c
> index e055bed7ae55..d26e6d52d01f 100644
> --- a/drivers/gpu/drm/xe/xe_sa.c
> +++ b/drivers/gpu/drm/xe/xe_sa.c
> @@ -49,7 +49,8 @@ struct xe_sa_manager *xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32
> bo = xe_managed_bo_create_pin_map(xe, tile, size,
> XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> XE_BO_FLAG_GGTT |
> - XE_BO_FLAG_GGTT_INVALIDATE);
> + XE_BO_FLAG_GGTT_INVALIDATE |
> + XE_BO_FLAG_PINNED_NORESTORE);
> if (IS_ERR(bo)) {
> drm_err(&xe->drm, "failed to allocate bo for sa manager: %ld\n",
> PTR_ERR(bo));
> --
> 2.47.1
>
next prev parent reply other threads:[~2024-12-16 17:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-16 16:29 [PATCH 1/7] drm/xe: use backup object for pinned save/restore Matthew Auld
2024-12-16 16:29 ` [PATCH 2/7] drm/xe: split pinned save/restore into phases Matthew Auld
2024-12-16 16:29 ` [PATCH 3/7] drm/xe: Add XE_BO_FLAG_PINNED_NORESTORE Matthew Auld
2024-12-16 17:23 ` Rodrigo Vivi [this message]
2024-12-16 16:29 ` [PATCH 4/7] drm/xe: add XE_BO_FLAG_PINNED_EARLY_RESTORE Matthew Auld
2024-12-16 16:29 ` [PATCH 5/7] drm/xe: unconditionally apply PINNED for pin_map() Matthew Auld
2024-12-16 16:29 ` [PATCH 6/7] drm/xe: allow non-contig VRAM kernel BO Matthew Auld
2024-12-16 16:29 ` [PATCH 7/7] drm/xe/sriov: support non-contig VRAM provisioning Matthew Auld
2024-12-16 16:38 ` ✓ CI.Patch_applied: success for series starting with [1/7] drm/xe: use backup object for pinned save/restore Patchwork
2024-12-16 16:39 ` ✗ CI.checkpatch: warning " Patchwork
2024-12-16 16:40 ` ✓ CI.KUnit: success " Patchwork
2024-12-16 16:58 ` ✓ CI.Build: " Patchwork
2024-12-16 17:00 ` ✗ CI.Hooks: failure " Patchwork
2024-12-16 17:02 ` ✓ CI.checksparse: success " Patchwork
2024-12-16 17:35 ` ✗ Xe.CI.BAT: failure " Patchwork
2024-12-16 18:56 ` [PATCH 1/7] " Matthew Auld
2024-12-16 18:59 ` ✗ Xe.CI.Full: failure for series starting with [1/7] " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Z2Bh9IFKqkzCSvYy@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=matthew.auld@intel.com \
--cc=matthew.brost@intel.com \
--cc=thomas.hellstrom@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.