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[75.164.218.15]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72aad816284sm21447037b3a.11.2024.12.31.15.01.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Dec 2024 15:01:54 -0800 (PST) Date: Tue, 31 Dec 2024 15:01:53 -0800 From: Drew Fustini To: Kilian Zinnecker Cc: buildroot@buildroot.org, Drew Fustini , Giulio Benetti Message-ID: References: <20241230224631.1080014-1-kilian.zinnecker@mail.de> <3603154.iIbC2pHGDl@kilian-laptop> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <3603154.iIbC2pHGDl@kilian-laptop> X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=beagleboard-org.20230601.gappssmtp.com; s=20230601; t=1735686115; x=1736290915; darn=buildroot.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=uvIsw99R4npZlCbUhXTK9pPWbOppXAA9IZRYcqS6SpE=; b=0ydep/nt1NTlvcheLFvHNMR/c3QCYlTYod6Hw4T050vtGpBycExYH4t+A79PAZ7LlQ N8MCeU9Y6/nfjoJLRfnG708nceBaSWZCmXlGFH2XkNpXMyIGOll6b9Akv7ZiOQxHeNPr DogeD+wIk3mj3ONfxQ6PIRZYPDWmJy8NSwMK+vTRDVaXCHNz0sPdazaJMPhsr2pZ4BHJ J0pbHDtDpijeqtR+VJejp2Mfr4FwQnTPntxNNSuPyUsFAevovaHd7L3Vbbq+6ueENnor 2pjcig9hQCoIally4u+oX1L2lWRA7Y5YYaXwgE2PnKckufymcEkko2VbVJ+ZJ18RyyUX 0wRQ== X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dmarc=fail (p=none dis=none) header.from=beagleboard.org X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=beagleboard-org.20230601.gappssmtp.com header.i=@beagleboard-org.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=0ydep/nt Subject: Re: [Buildroot] [PATCH v5 0/2] Add board support for the BeagleV-Ahead X-BeenThere: buildroot@buildroot.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Discussion and development of buildroot List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: buildroot-bounces@buildroot.org Sender: "buildroot" [resending from an address that is subscribed to the buidroot list] On Mon, Dec 30, 2024 at 11:53:43PM +0100, Kilian Zinnecker via buildroot wrote: > Hello all, > > please feel free to give feedback once more if you like, but please don't > apply this series of the patches yet, since there are still some open issues: > > 1) Still there is no LICENSE file in the xuantie-bins repository - hopefully I > can get someone to add the proper license eventually. > > 2) The uboot is still the custom one. In the past I was not able to get the > official uboot running, which features the Lichee Pi 4A - another board with the > same SoC. I don't know, whether I can get it running though. So far I was not > successfull. > > 3) Currently it seems that only one of the SoC's 4 cores gets activated. I see > the following in my bootlog: > > [ 0.111209] smp: Bringing up secondary CPUs ... > [ 1.132870] CPU1: failed to come online > [ 2.161923] CPU2: failed to come online > [ 3.190788] CPU3: failed to come online > [ 3.194847] smp: Brought up 1 node, 1 CPU > > I didn't look into it yet. If anyone has a suggestion, what could be going > wrong, please tell me. When the TH1520-based Ahead and LPi4a boards launched, there was a device tree node that was parsed by OpenSBI to start up the other harts: https://openbeagle.org/beaglev-ahead/beaglev-ahead-linux/-/blob/beaglev-v5.10.113-1.1.2/arch/riscv/boot/dts/thead/light.dtsi#L380 reset: reset-sample { compatible = "thead,reset-sample"; plic-delegate = <0xff 0xd81ffffc>; entry-reg = <0xff 0xff019050>; entry-cnt = <4>; control-reg = <0xff 0xff015004>; control-val = <0x1c>; csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>; }; The node was handled by OpenSBI in lib/utils/reset/fdt_reset_thead.c. The problem was that the design of this device tree node had flaws from the viewpoint of the device tree maintainers. Therefore, the upstream th1520.dtsi doesn't have the reset-sample node. One would need to keep a downstream version of th1520.dtsi that adds that reset-sample node. However, this functionality was removed last year from OpenSBI, I think the change made it in the OpensBI v1.4 release: https://github.com/riscv-software-src/opensbi/commit/d1e0f7f25b2f1527425942dfc327f1d4a61bbff4 > In the past, we used fdt_reset_thead to help customers with prototype > verification. However, with the emergence of the Big-little SoC system, > it can no longer meet the demand. Therefore, we use zero_stage_boot > instead of fdt_reset_thead. It cleans up the opensbi code and ends the > disputation of reset_sample's dts. Thus for OpenSBI v1.4+, one must have an updated U-Boot SPL build that performs this reset functionality that OpenSBI used to. SPL is the early portion of U-Boot that does early setup like DDR training. There is a build of U-Boot SPL for the LPi4a from RevyOS that does this. However, I'm not sure about the status for the Ahead so I'll have to followup on that. Cheers, Drew _______________________________________________ buildroot mailing list buildroot@buildroot.org https://lists.buildroot.org/mailman/listinfo/buildroot