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From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH] drm/xe/oa: Add missing VISACTL mux registers
Date: Mon, 13 Jan 2025 14:23:39 -0800	[thread overview]
Message-ID: <Z4WSaynlrcdItaPK@orsosgc001> (raw)
In-Reply-To: <20250111021539.2920346-1-ashutosh.dixit@intel.com>

On Fri, Jan 10, 2025 at 06:15:39PM -0800, Ashutosh Dixit wrote:
>Add missing VISACTL mux registers required for some OA config's.
>
>Fixes: cdf02fe1a94a ("drm/xe/oa/uapi: Add/remove OA config perf ops")
>Cc: stable@vger.kernel.org
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

LGTM,

Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Thanks,
Umesh
>---
> drivers/gpu/drm/xe/xe_oa.c | 1 +
> 1 file changed, 1 insertion(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 4e00a77289c50..eeb96b5f49e2a 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -2163,6 +2163,7 @@ static const struct xe_mmio_range xe2_oa_mux_regs[] = {
> 	{ .start = 0x5194, .end = 0x5194 },	/* SYS_MEM_LAT_MEASURE_MERTF_GRP_3D */
> 	{ .start = 0x8704, .end = 0x8704 },	/* LMEM_LAT_MEASURE_MCFG_GRP */
> 	{ .start = 0xB1BC, .end = 0xB1BC },	/* L3_BANK_LAT_MEASURE_LBCF_GFX */
>+	{ .start = 0xD0E0, .end = 0xD0F4 },	/* VISACTL */
> 	{ .start = 0xE18C, .end = 0xE18C },	/* SAMPLER_MODE */
> 	{ .start = 0xE590, .end = 0xE590 },	/* TDL_LSC_LAT_MEASURE_TDL_GFX */
> 	{ .start = 0x13000, .end = 0x137FC },	/* PES_0_PESL0 - PES_63_UPPER_PESL3 */
>-- 
>2.47.1
>

      parent reply	other threads:[~2025-01-13 22:23 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-11  2:15 [PATCH] drm/xe/oa: Add missing VISACTL mux registers Ashutosh Dixit
2025-01-11  2:23 ` ✓ CI.Patch_applied: success for " Patchwork
2025-01-11  2:23 ` ✓ CI.checkpatch: " Patchwork
2025-01-11  2:24 ` ✓ CI.KUnit: " Patchwork
2025-01-11  2:42 ` ✓ CI.Build: " Patchwork
2025-01-11  2:45 ` ✓ CI.Hooks: " Patchwork
2025-01-11  2:46 ` ✓ CI.checksparse: " Patchwork
2025-01-11  3:14 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-01-12 22:13 ` ✓ CI.Patch_applied: success for drm/xe/oa: Add missing VISACTL mux registers (rev2) Patchwork
2025-01-12 22:13 ` ✓ CI.checkpatch: " Patchwork
2025-01-12 22:15 ` ✓ CI.KUnit: " Patchwork
2025-01-12 22:33 ` ✓ CI.Build: " Patchwork
2025-01-12 22:35 ` ✓ CI.Hooks: " Patchwork
2025-01-12 22:37 ` ✓ CI.checksparse: " Patchwork
2025-01-12 23:05 ` ✓ Xe.CI.BAT: " Patchwork
2025-01-13 22:23 ` Umesh Nerlige Ramappa [this message]

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