All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Jouni Högander" <jouni.hogander@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	animesh.manna@intel.com, ville.syrjala@intel.com
Subject: Re: [PATCH v4 10/13] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit
Date: Fri, 24 Jan 2025 13:46:23 +0200	[thread overview]
Message-ID: <Z5N9jzJZaZktVYUk@intel.com> (raw)
In-Reply-To: <20250124105625.822459-11-jouni.hogander@intel.com>

On Fri, Jan 24, 2025 at 12:56:21PM +0200, Jouni Högander wrote:
> We have different approach on how flip is considered being complete. We are
> waiting for vblank on DSB and generate interrupt when it happens and this
> interrupt is considered as indication of completion -> we definitely do not
> want to skip vblank wait.
> 
> Also not skipping scanline wait shouldn't cause any problems if we are in
> DEEP_SLEEP PIPEDSL register is returning 0 -> evasion does nothing and if
> we are not in DEEP_SLEEP evasion works same way as without PSR.
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 89d3496bcbdbd..bb77ded8bf726 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -168,13 +168,12 @@ static u32 dsb_chicken(struct intel_atomic_state *state,
>  		       struct intel_crtc *crtc)
>  {

IIRC bspec suggests that we should always set DSB_SKIP_WAITS_EN,
so we should probably have a comment here explaining our reason
for omitting it. Otherwise I fear that someone is going to be
blindly reading the spec and then try to add the bit back.

>  	if (pre_commit_is_vrr_active(state, crtc))
> -		return DSB_SKIP_WAITS_EN |
> -			DSB_CTRL_WAIT_SAFE_WINDOW |
> +		return DSB_CTRL_WAIT_SAFE_WINDOW |
>  			DSB_CTRL_NO_WAIT_VBLANK |
>  			DSB_INST_WAIT_SAFE_WINDOW |
>  			DSB_INST_NO_WAIT_VBLANK;
>  	else
> -		return DSB_SKIP_WAITS_EN;
> +		return 0;
>  }
>  
>  static bool assert_dsb_has_room(struct intel_dsb *dsb)
> -- 
> 2.43.0

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2025-01-24 11:46 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-24 10:56 [PATCH v4 00/13] PSR DSB support Jouni Högander
2025-01-24 10:56 ` [PATCH v4 01/13] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 02/13] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 03/13] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 04/13] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2025-01-24 10:56 ` [PATCH v4 05/13] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2025-01-24 10:56 ` [PATCH v4 06/13] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Jouni Högander
2025-01-24 10:56 ` [PATCH v4 07/13] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2025-01-24 10:56 ` [PATCH v4 08/13] drm/i915/psr: Add intel_psr_is_psr_mode_changing Jouni Högander
2025-01-24 10:56 ` [PATCH v4 09/13] drm/i915/display: Don't use DSB if psr mode changing Jouni Högander
2025-01-24 11:53   ` Ville Syrjälä
2025-01-24 12:09     ` Hogander, Jouni
2025-01-24 12:16       ` Hogander, Jouni
2025-01-24 12:32         ` Ville Syrjälä
2025-01-24 12:35           ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 10/13] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit Jouni Högander
2025-01-24 11:46   ` Ville Syrjälä [this message]
2025-01-24 11:51     ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 11/13] drm/i915/display: Evade scanline 0 as well if PSR1 or PSR2 is enabled Jouni Högander
2025-01-24 11:39   ` Ville Syrjälä
2025-01-24 11:57     ` Hogander, Jouni
2025-01-24 12:37       ` Ville Syrjälä
2025-01-24 12:41         ` Hogander, Jouni
2025-01-24 12:49           ` Ville Syrjälä
2025-01-27 14:53             ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 12/13] drm/i915/display: Ensure we have "Frame Change" event in DSB commit Jouni Högander
2025-01-24 11:43   ` Ville Syrjälä
2025-01-24 11:57     ` Ville Syrjälä
2025-01-24 12:10     ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 13/13] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2025-01-24 11:05 ` ✗ CI.Patch_applied: failure for PSR DSB support (rev4) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Z5N9jzJZaZktVYUk@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=animesh.manna@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=jouni.hogander@intel.com \
    --cc=ville.syrjala@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.