From: Chao Gao <chao.gao@intel.com>
To: Binbin Wu <binbin.wu@linux.intel.com>
Cc: <pbonzini@redhat.com>, <seanjc@google.com>, <kvm@vger.kernel.org>,
<rick.p.edgecombe@intel.com>, <kai.huang@intel.com>,
<adrian.hunter@intel.com>, <reinette.chatre@intel.com>,
<xiaoyao.li@intel.com>, <tony.lindgren@intel.com>,
<isaku.yamahata@intel.com>, <yan.y.zhao@intel.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 03/17] KVM: VMX: Move posted interrupt delivery code to common header
Date: Thu, 13 Feb 2025 14:59:02 +0800 [thread overview]
Message-ID: <Z62YNrvnJ9Dzw7GE@intel.com> (raw)
In-Reply-To: <20250211025828.3072076-4-binbin.wu@linux.intel.com>
>+/*
>+ * Send interrupt to vcpu via posted interrupt way.
>+ * 1. If target vcpu is running(non-root mode), send posted interrupt
>+ * notification to vcpu and hardware will sync PIR to vIRR atomically.
This comment primarily describes what kvm_vcpu_trigger_posted_interrupt() does.
And, it is not entirely accurate, as it is not necessarily the "hardware" that
syncs PIR to vIRR (see case 2 & 3 in the comment in
kvm_vcpu_trigger_posted_interrupt()).
How about:
/*
* Post an interrupt to a vCPU's PIR and trigger the vCPU to process the
* interrupt if necessary.
*/
Other than that, the patch looks good to me
Reviewed-by: Chao Gao <chao.gao@intel.com>
>+ * 2. If target vcpu isn't running(root mode), kick it to pick up the
>+ * interrupt from PIR in next vmentry.
>+ */
>+static inline void __vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu,
>+ struct pi_desc *pi_desc, int vector)
>+{
>+ if (pi_test_and_set_pir(vector, pi_desc))
>+ return;
>+
>+ /* If a previous notification has sent the IPI, nothing to do. */
>+ if (pi_test_and_set_on(pi_desc))
>+ return;
>+
>+ /*
>+ * The implied barrier in pi_test_and_set_on() pairs with the smp_mb_*()
>+ * after setting vcpu->mode in vcpu_enter_guest(), thus the vCPU is
>+ * guaranteed to see PID.ON=1 and sync the PIR to IRR if triggering a
>+ * posted interrupt "fails" because vcpu->mode != IN_GUEST_MODE.
>+ */
>+ kvm_vcpu_trigger_posted_interrupt(vcpu, POSTED_INTR_VECTOR);
>+}
>+
next prev parent reply other threads:[~2025-02-13 6:59 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 2:58 [PATCH v2 00/17] KVM: TDX: TDX interrupts Binbin Wu
2025-02-11 2:58 ` [PATCH v2 01/17] KVM: TDX: Add support for find pending IRQ in a protected local APIC Binbin Wu
2025-02-11 7:23 ` Binbin Wu
2025-02-12 8:12 ` Chao Gao
2025-02-12 16:04 ` Sean Christopherson
2025-02-13 2:12 ` Chao Gao
2025-02-11 2:58 ` [PATCH v2 02/17] KVM: TDX: Disable PI wakeup for IPIv Binbin Wu
2025-02-11 2:58 ` [PATCH v2 03/17] KVM: VMX: Move posted interrupt delivery code to common header Binbin Wu
2025-02-13 6:59 ` Chao Gao [this message]
2025-02-11 2:58 ` [PATCH v2 04/17] KVM: TDX: Implement non-NMI interrupt injection Binbin Wu
2025-02-13 7:15 ` Chao Gao
2025-02-11 2:58 ` [PATCH v2 05/17] KVM: x86: Assume timer IRQ was injected if APIC state is protected Binbin Wu
2025-02-13 7:26 ` Chao Gao
2025-02-11 2:58 ` [PATCH v2 06/17] KVM: TDX: Wait lapic expire when timer IRQ was injected Binbin Wu
2025-02-11 2:58 ` [PATCH v2 07/17] KVM: TDX: Implement methods to inject NMI Binbin Wu
2025-02-11 2:58 ` [PATCH v2 08/17] KVM: TDX: Complete interrupts after TD exit Binbin Wu
2025-02-13 8:20 ` Chao Gao
2025-02-13 8:55 ` Binbin Wu
2025-02-11 2:58 ` [PATCH v2 09/17] KVM: TDX: Handle SMI request as !CONFIG_KVM_SMM Binbin Wu
2025-02-12 1:47 ` Sean Christopherson
2025-02-12 5:51 ` Binbin Wu
2025-02-14 17:15 ` Edgecombe, Rick P
2025-02-12 10:19 ` Huang, Kai
2025-02-11 2:58 ` [PATCH v2 10/17] KVM: TDX: Always block INIT/SIPI Binbin Wu
2025-02-11 2:58 ` [PATCH v2 11/17] KVM: TDX: Enforce KVM_IRQCHIP_SPLIT for TDX guests Binbin Wu
2025-02-11 2:58 ` [PATCH v2 12/17] KVM: TDX: Force APICv active for TDX guest Binbin Wu
2025-02-11 2:58 ` [PATCH v2 13/17] KVM: TDX: Add methods to ignore virtual apic related operation Binbin Wu
2025-02-11 2:58 ` [PATCH v2 14/17] KVM: VMX: Move emulation_required to struct vcpu_vt Binbin Wu
2025-02-11 2:58 ` [PATCH v2 15/17] KVM: VMX: Add a helper for NMI handling Binbin Wu
2025-02-12 1:10 ` Sean Christopherson
2025-02-11 2:58 ` [PATCH v2 16/17] KVM: TDX: Handle EXCEPTION_NMI and EXTERNAL_INTERRUPT Binbin Wu
2025-02-12 0:50 ` Sean Christopherson
2025-02-11 2:58 ` [PATCH v2 17/17] KVM: TDX: Handle EXIT_REASON_OTHER_SMI Binbin Wu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Z62YNrvnJ9Dzw7GE@intel.com \
--to=chao.gao@intel.com \
--cc=adrian.hunter@intel.com \
--cc=binbin.wu@linux.intel.com \
--cc=isaku.yamahata@intel.com \
--cc=kai.huang@intel.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=reinette.chatre@intel.com \
--cc=rick.p.edgecombe@intel.com \
--cc=seanjc@google.com \
--cc=tony.lindgren@intel.com \
--cc=xiaoyao.li@intel.com \
--cc=yan.y.zhao@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.