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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski <brgl@bgdev.pl>
Subject: Re: small brainstorm for the problem I have
Date: Thu, 13 Feb 2025 09:58:35 +0200	[thread overview]
Message-ID: <Z62mK8ZUr3IDzewt@smile.fi.intel.com> (raw)
In-Reply-To: <CACRpkdbUCjeJXkc4iBBqJFsQ3sEbiv8HO9eh7ft5dAC88f7XSQ@mail.gmail.com>

On Wed, Feb 12, 2025 at 11:55:31PM +0100, Linus Walleij wrote:
> On Mon, Feb 10, 2025 at 10:31 AM Andy Shevchenko
> <andriy.shevchenko@linux.intel.com> wrote:
> 
> > 2) The firmware for the device uses already some names for the GPIO lines that
> > not compatible with SPI GPIO schema.
> 
> I guess you mean the node names
> like "cs", "mosi", "miso", "sck"?
> 
> > I was thinking about the following:
> > 1) Use GPIO aggregator to fake the chip that will provide necessary names.
> >
> > 2) Hack the GPIO library to add a quirk for this specific device to translate
> > the line names.
> 
> I would honestly do (2) if it was device tree, because we already
> have nicely centralized quirks for it, but for ACPI I don't know :/
> Aggregator feels a bit like overkill for this.

Interestingly, I feel the same. The aggregator approach is something like +100+
LoCs for a little benefit + runtime overhead.

But this sounds like we would need some kind of translation quirks done in gpiolib-acpi.c.
In the similar way as OF does.

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2025-02-13  7:58 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-10  9:31 small brainstorm for the problem I have Andy Shevchenko
2025-02-11 12:14 ` Bartosz Golaszewski
2025-02-11 12:21   ` Andy Shevchenko
2025-02-12 22:55 ` Linus Walleij
2025-02-13  7:58   ` Andy Shevchenko [this message]
2025-02-13 11:24     ` Linus Walleij

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