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[99.254.114.190]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6e44eb52460sm2915526d6.8.2025.02.07.08.54.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:54:11 -0800 (PST) Date: Fri, 7 Feb 2025 11:54:09 -0500 From: Peter Xu To: Eric Auger Cc: eric.auger.pro@gmail.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, mst@redhat.com, jasowang@redhat.com, imammedo@redhat.com, alex.williamson@redhat.com, clg@redhat.com, philmd@linaro.org, zhenzhong.duan@intel.com, ddutile@redhat.com Subject: Re: [PATCH 0/5] Fix vIOMMU reset order Message-ID: References: <20250206142307.921070-1-eric.auger@redhat.com> MIME-Version: 1.0 In-Reply-To: <20250206142307.921070-1-eric.auger@redhat.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: aTGelpf_1EgJUhwypCiNy9r4bw70urDPcenZ-4Ql1QA_1738947252 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Received-SPF: pass client-ip=170.10.129.124; envelope-from=peterx@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: vVGxyIuFAr5w On Thu, Feb 06, 2025 at 03:21:51PM +0100, Eric Auger wrote: > This is a follow-up of Peter's attempt to fix the fact that > vIOMMUs are likely to be reset before the device they protect: > > [PATCH 0/4] intel_iommu: Reset vIOMMU after all the rest of devices > https://lore.kernel.org/all/20240117091559.144730-1-peterx@redhat.com/ > > This is especially observed with virtio devices when a qmp system_reset > command is sent but also with VFIO devices. > > This series puts the vIOMMU reset in the 3-phase exit callback. > > This scheme was tested successful with virtio-devices and some > VFIO devices. Nevertheless not all the topologies have been > tested yet. Eric, It's great to know that we seem to be able to fix everything in such small changeset! I would like to double check two things with you here: - For VFIO's reset hook, looks like we have landed more changes so that vfio's reset function is now a TYPE_LEGACY_RESET, and it always do the reset during "hold" phase only (via legacy_reset_hold()). That part will make sure vIOMMU (if switching to exit()-only reset) will order properly with VFIO. Is my understanding correct here? - Is it possible if some PCIe devices that will provide its own phase.exit(), would it matter on the order of PCIe device's phase.exit() and vIOMMU's phase.exit() (if vIOMMUs switch to use exit()-only approach like this one)? PS: it would be great to attach such information in either cover letter or commit message. But definitely not a request to repost the patchset, if Michael would have Message-ID when merge that'll be far enough to help anyone find this discussion again. Thanks! -- Peter Xu