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Mon, 10 Feb 2025 06:18:47 -0800 (PST) X-Received: by 2002:ac8:5895:0:b0:45d:9357:1cca with SMTP id d75a77b69052e-47167a156d4mr174917751cf.14.1739197127574; Mon, 10 Feb 2025 06:18:47 -0800 (PST) Received: from x1.local ([2604:7a40:2041:2b00::1000]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6e44f7dcdf0sm29929926d6.39.2025.02.10.06.18.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 06:18:46 -0800 (PST) Date: Mon, 10 Feb 2025 09:18:43 -0500 From: Peter Xu To: Eric Auger Cc: Peter Maydell , eric.auger.pro@gmail.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, mst@redhat.com, jasowang@redhat.com, imammedo@redhat.com, alex.williamson@redhat.com, clg@redhat.com, philmd@linaro.org, zhenzhong.duan@intel.com, ddutile@redhat.com Subject: Re: [PATCH 4/5] hw/arm/smmuv3: Move reset to exit phase Message-ID: References: <20250206142307.921070-1-eric.auger@redhat.com> <20250206142307.921070-5-eric.auger@redhat.com> <7102d470-ac72-4c02-b8bc-20f1379a4843@redhat.com> <3db2e0a7-0f38-4c6a-a9a4-d44e0c6af436@redhat.com> MIME-Version: 1.0 In-Reply-To: <3db2e0a7-0f38-4c6a-a9a4-d44e0c6af436@redhat.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: hM8eVptSgNB1n-P6jJ2UOxbunAnjFalrdp-rKx7mh7A_1739197129 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=peterx@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.388, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: bhcSAyTdGYwo On Mon, Feb 10, 2025 at 09:35:53AM +0100, Eric Auger wrote: > Hi Peter, Eric, > > > On 2/7/25 6:47 PM, Peter Xu wrote: > > On Fri, Feb 07, 2025 at 04:58:39PM +0000, Peter Maydell wrote: > >> (I wonder if we ought to suggest quiescing outstanding > >> DMA in the enter phase? But it's probably easier to fix > >> the iommus like this series does than try to get every > >> dma-capable pci device to do something different.) > > I wonder if we should provide some generic helper to register vIOMMU reset > > callbacks, so that we'll be sure any vIOMMU model impl that will register > > at exit() phase only, and do nothing during the initial two phases. Then > > we can put some rich comment on that helper on why. > As discussed with Cédric, I think it shall think about having eventually > a base class for vIOMMU. Maybe this is something we can handle > afterwards though. Yes agreed. > > > > Looks like it means the qemu reset model in the future can be a combination > > of device tree (which resets depth-first) and the three phases model. We > > will start to use different approach to solve different problems. > > > > Maybe after we settle our mind, we should update the reset document, > > e.g. for device emulation developers, we need to be clear on where to > > quiesce the DMAs, and it must not happen at exit(). Both all devices and > > all iommu impls need to follow the rules to make it work like the plan. > The 3 phase documentation already states that you shouldn't do anything > in enter phase that can have side-effect on other devices. However I > agree we can add another example besides the qemu_irq line one. The document will be relevant to two sides of things (so far not relevant to enter() phase, but more on what we should put into the last two phases either for vIOMMU impl or a PCIe device impl), that I commented in the other reply to Peter. I am not sure whether we need such fine granule document, but in all cases I agree this can definitely be done later. :) Thanks! -- Peter Xu