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Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250210_131336_724064_4FA20320 X-CRM114-Status: GOOD ( 51.67 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org T24gTW9uLCBGZWIgMTAsIDIwMjUgYXQgMDk6NTc6MjZQTSArMDEwMCwgQ2zDqW1lbnQgTMOpZ2Vy IHdyb3RlOgo+IAo+IAo+IE9uIDEwLzAyLzIwMjUgMjE6NTMsIENoYXJsaWUgSmVua2lucyB3cm90 ZToKPiA+IE9uIE1vbiwgRmViIDEwLCAyMDI1IGF0IDA5OjQyOjI1UE0gKzAxMDAsIENsw6ltZW50 IEzDqWdlciB3cm90ZToKPiA+Pgo+ID4+Cj4gPj4gT24gMTAvMDIvMjAyNSAxODoyMCwgQ2hhcmxp ZSBKZW5raW5zIHdyb3RlOgo+ID4+PiBPbiBNb24sIEZlYiAxMCwgMjAyNSBhdCAwMzoyMDozNFBN ICswMTAwLCBDbMOpbWVudCBMw6lnZXIgd3JvdGU6Cj4gPj4+Pgo+ID4+Pj4KPiA+Pj4+IE9uIDEw LzAyLzIwMjUgMTU6MDYsIEFuZHJldyBKb25lcyB3cm90ZToKPiA+Pj4+PiBPbiBNb24sIEZlYiAx MCwgMjAyNSBhdCAxMjowNzo0MFBNICswMTAwLCBDbMOpbWVudCBMw6lnZXIgd3JvdGU6Cj4gPj4+ Pj4+Cj4gPj4+Pj4+Cj4gPj4+Pj4+IE9uIDEwLzAyLzIwMjUgMTE6MTYsIEFudXAgUGF0ZWwgd3Jv dGU6Cj4gPj4+Pj4+PiBPbiBTYXQsIEZlYiA4LCAyMDI1IGF0IDY6NTPigK9BTSBDaGFybGllIEpl bmtpbnMgPGNoYXJsaWVAcml2b3NpbmMuY29tPiB3cm90ZToKPiA+Pj4+Pj4+Pgo+ID4+Pj4+Pj4+ IE9uIEZyaSwgRmViIDA3LCAyMDI1IGF0IDA1OjE5OjQ3UE0gKzAxMDAsIEFuZHJldyBKb25lcyB3 cm90ZToKPiA+Pj4+Pj4+Pj4gUHJvYmluZyB1bmFsaWduZWQgYWNjZXNzZXMgb24gYm9vdCBpcyB0 aW1lIGNvbnN1bWluZy4gUHJvdmlkZSBhCj4gPj4+Pj4+Pj4+IGZ1bmN0aW9uIHdoaWNoIHdpbGwg YmUgdXNlZCB0byBsb29rIHVwIHRoZSBhY2Nlc3MgdHlwZSBpbiBhIHRhYmxlCj4gPj4+Pj4+Pj4+ IGJ5IGlkIHJlZ2lzdGVycy4gVmVuZG9ycyB3aGljaCBwcm92aWRlIHRhYmxlIGVudHJpZXMgY2Fu IHRoZW4gc2tpcAo+ID4+Pj4+Pj4+PiB0aGUgcHJvYmluZy4KPiA+Pj4+Pj4+Pgo+ID4+Pj4+Pj4+ IFRoZSBhY2Nlc3MgY2hlY2tlciBpbiBteSBleHBlcmllbmNlIGlzIG9ubHkgdGltZSBjb25zdW1p bmcgb24gc2xvdwo+ID4+Pj4+Pj4+IGhhcmR3YXJlLiBIYXJkd2FyZSB0aGF0IHN1cHBvcnRzIGZh c3QgdW5hbGlnbmVkIGFjY2Vzc2VzIGlzbid0IHJlYWxseQo+ID4+Pj4+Pj4+IGltcGFjdGVkIGJ5 IHRoaXM/IEF2b2lkaW5nIGEgbGlzdCBvZiBoYXJkd2FyZSB0aGF0IGhhcyBzbG93L2Zhc3QKPiA+ Pj4+Pj4+PiB1bmFsaWduZWQgYWNjZXNzZXMgaW4gdGhlIGtlcm5lbCB3YXMgdGhlIG1haW4gcmVh c29uIGZvciBkeW5hbWljYWxseQo+ID4+Pj4+Pj4+IGNoZWNraW5nLiBXZSBkaWQgaW50cm9kdWNl IHRoZSBjb25maWcgb3B0aW9uIHRvIGNvbXBpbGUgdGhlIGtlcm5lbCB3aXRoCj4gPj4+Pj4+Pj4g YXNzdW1lZCBzbG93L2Zhc3QgYWNjZXNzZXMsIHdoaWNoIG9mIGNvdXJzZSBoYXMgdGhlIGRvd25z aWRlIG9mCj4gPj4+Pj4+Pj4gcmVjb21waWxpbmcgdGhlIGtlcm5lbCBhbmQgSSBhc3N1bWUgdGhh dCB5b3UgYWxyZWFkeSBjb25zaWRlcmVkIHRoYXQuCj4gPj4+Pj4+Pgo+ID4+Pj4+Pj4gVGhlIGtj b25maWcgb3B0aW9uIGRvZXMgbm90IGFsaWduIHdpdGggdGhlIHZpc2lvbiBvZiBydW5uaW5nIHRo ZSBzYW1lCj4gPj4+Pj4+PiBrZXJuZWwgaW1hZ2UgYWNyb3NzIHBsYXRmb3Jtcy4KPiA+Pj4+Pj4K PiA+Pj4+Pj4gSSdkIHdvdWxkIGJlIGFkdm9jYXRpbmcgdG8gcmVtb3ZlIGNvbXBpbGUgdGltZSBv cHRpb25zIGFzIHdlbGwgYW5kIHVzZQo+ID4+Pj4+PiBhbm90aGVyIHdheSB0byBza2lwIHRoZSBw cm9iZSAoc2VlIGJlbG93KS4KPiA+Pj4+Pj4KPiA+Pj4+Pj4+Cj4gPj4+Pj4+Pj4KPiA+Pj4+Pj4+ PiBJbnN0ZWFkIG9mIGhhdmluZyBhIHRhYmxlIGluIHRoZSBrZXJuZWwsIHNvbWV0aGluZyB0aGF0 IHdvdWxkIGJlIG1vcmUKPiA+Pj4+Pj4+PiBwbGF0Zm9ybSBhZ25vc3RpYyB3b3VsZCBiZSB0byBo YXZlIGFuIGV4dGVuc2lvbiB0aGF0IHNpZ25hbHMgdGhpcwo+ID4+Pj4+Pj4+IGluZm9ybWF0aW9u LiBUaGF0IHNlZW1zIGxpa2UgaXQgd291bGQgYWNjb21wbGlzaCB0aGUgc2FtZSBnb2FsIGFuZAo+ ID4+Pj4+Pj4+IGxldmVyYWdlIHRoZSBleGlzdGluZyBpbmZyYXN0cnVjdHVyZSBpbiB0aGUga2Vy bmVsLCBhbGJlaXQgd2l0aCB0aGUgbmVlZAo+ID4+Pj4+Pj4+IHRvIG1ha2UgYSBuZXcgZXh0ZW5z aW9uLgo+ID4+Pj4+Pj4+Cj4gPj4+Pj4+Pgo+ID4+Pj4+Pj4gSU1PLCBleHBlY3RpbmcgYW4gSVNB IGV4dGVuc2lvbiB0byBiZSBkZWZpbmVkIGZvciBhbGwgcG9zc2libGUKPiA+Pj4+Pj4+IG1pY3Jv YXJjaGl0ZWN0dXJhbCBjaG9pY2VzIGlzIG5vdCBnb2luZyB0byBzY2FsZSBzbyBpdCBpcyBiZXR0 ZXIKPiA+Pj4+Pj4+IHRvIGhhdmUgaW5mcmFzdHJ1Y3R1cmUgaW4ga2VybmVsIGl0c2VsZiB0byBp bmZlciBtaWNyb2FyY2hpdGVjdHVyYWwKPiA+Pj4+Pj4+IGNob2ljZXMgYmFzZWQgb24gUklTQy1W IGltcGxlbWVudGF0aW9uIElELgo+ID4+Pj4+Pgo+ID4+Pj4+PiBTaW5jZSBhZGRpbmcgYW4gZXh0 ZW5zaW9uIHNlZW1zIHF1aXRlIHVubGlrZWx5LCBhbmQgdGhhdCBhIGRldmljZS10cmVlCj4gPj4+ Pj4+IHByb3BlcnR5IGlzIGxpa2VseSBEVCBjZW50cmljIGFuZCBub3QgYXBwbGljYWJsZSB0byBB Q1BJIGFzIHdlbGwsIHdhcyBhCj4gPj4+Pj4+IGNvbW1hbmQgbGluZSBhcmd1bWVudCBjb25zaWRl cmVkID8KPiA+Pj4+Pj4KPiA+Pj4+Pgo+ID4+Pj4+IEkgZGlkIGNvbnNpZGVyIGFkZGluZyBhIGNv bW1hbmQgbGluZSBvcHRpb24gaW4gYWRkaXRpb24gdG8gdGhlIHRhYmxlLAo+ID4+Pj4+IGFsbG93 aW5nIHBsYXRmb3JtcyB3aGljaCBuZWl0aGVyIGhhdmUgYSB0YWJsZSBlbnRyeSBbeWV0XSBub3Ig d2FudCB0byBkbwo+ID4+Pj4+IHRoZSBzcGVlZCB0ZXN0LCB0byBzZXQgd2hhdGV2ZXIgdGhleSBs aWtlLiBJbiB0aGUgZW5kLCBJIGRyb3BwZWQgaXQsIHNpbmNlCj4gPj4+Pj4gSSBkb24ndCBoYXZl IGEgdXNlIGNhc2UgYXQgdGhpcyB0aW1lLiBIb3dldmVyLCBpZiB3ZSByZWFsbHkgZG9uJ3Qgd2Fu dCBhCj4gPj4+Pj4gdGFibGUsIHRoZW4gSSBjYW4gbG9vayBpbnRvIHRoZSBjb21tYW5kIGxpbmUg b3B0aW9uIGluc3RlYWQuCj4gPj4+Pgo+ID4+Pj4gU29ycnkgaWYgSSB3YXNuJ3QgY2xlYXIsIEkg d2Fzbid0IGNvbnNpZGVyaW5nIHRoaXMgYXMgYSByZXBsYWNlbWVudCBmb3IKPiA+Pj4+IHlvdXIg dGFibGUgYnV0IHJhdGhlciBhcyBhIHJlcGxhY2VtZW50IHRvIENoYXJsaWUncyBjb21waWxlIHRp bWUgZGVmaW5lCj4gPj4+PiB0byBza2lwIG1pc2FsaWduZWQgc3BlZWQgcHJvYmluZyBzaW5jZSBp dCBpcyBsaWtlICJscGo9PHg+Ii4gWW91IGNhbgo+ID4+Pj4gc3BlY2lmeSBpdCBvbiBjb21tYW5k IGxpbmUgaWYgeW91IHdhbnQgdG8gc2tpcCB0aGUgbG9vcCB0aW1lIGRldGVjdGlvbgo+ID4+Pj4g b2YgbG9vcHMgcGVyIGppZmZpZXMgYW5kIGhhdmUgZmFzdGVyIGJvb3QuCj4gPj4+Cj4gPj4+IEpl c3NlIHNlbnQgb3V0IGEgcGF0Y2ggZm9yIGEga2VybmVsIHBhcmFtZXRlciB0byBzZXQgdGhlIGFj Y2VzcyBzcGVlZCB0bwo+ID4+PiB3aGF0ZXZlciBpcyBkZXNpcmVkIFsxXS4KPiA+Pgo+ID4+IEhl eSBDaGFybGllLAo+ID4+Cj4gPj4gVGhhbmtzIGJ1dCBpdCBzZWVtcyB5b3UgZm9yZ290IHRvIGFk ZCB0aGUgbGluayA/Cj4gPiAKPiA+IE9vcHMsIEkgZnJlcXVlbnRseSBkbyB0aGF0Li4uCj4gPiAK PiA+IGh0dHBzOi8vbG9yZS5rZXJuZWwub3JnL2xpbnV4LXJpc2N2LzIwMjQwODA1MTczODE2LjM3 MjIwMDItMS1qZXNzZUByaXZvc2luYy5jb20vCj4gPiAKPiA+Pgo+ID4+IEhhdmluZyBjb25maWd1 cmF0aW9uIG9wdGlvbiArIGNvbW1hbmQgbGluZSBvcHRpb24gc2VlbXMgbGlrZSBzb21ldGhpbmcK PiA+PiBwYXJ0aWN1bGFybHkgaGVhdnkgZm9yIHN1Y2ggZmVhdHVyZS4gVGhlIGlmZGVmZXJ5L2Nv bmZpZyBvcHRpb25zCj4gPj4gaW52b2x2ZWQgaW4gdGhlIG1pc2FsaWduZWQgcHJvYmluZyBjb2Rl IGlzIGFscmVhZHkgcXVpdGUgY29tcGxpY2F0ZWQuIElmCj4gPj4gYW5vdGhlciBtZWFuIHRvIHNw ZWNpZnkgdGhlIG1pc2FsaWduZWQgc3BlZWQgYWNjZXNzIGlzIGFkZGVkLCBJIHRoaW5rCj4gPj4g YWxsIGNvbmZpZ3VyYXRpb24gb3B0aW9ucyB0byBzZXQgdGhlIHNwZWVkIG9mIGFjY2Vzc2VzIGNh biB0aGVuIGJlCj4gPj4gcmVtb3ZlZCBhbmQganVzdCBrZWVwIHRoZSBjb21tYW5kIGxpbmUuIFRo YXQgd2lsbCBjZXJ0YWlubHkgc2ltcGxpZnkgdGhlCj4gPj4gaWZkZWYvY29uZmlnIG9wdGlvbnMu Cj4gPiAKPiA+IFllYWggdGhhdCdzIHdoeSBpdCBkaWRuJ3QgZ2V0IG1lcmdlZCBiZWNhdXNlIGl0 IGZlbHQgbGlrZSBvdmVya2lsbC4gSQo+ID4gcmVzcG9uZGVkIG9uIHRoZSB0aHJlYWQgdG8gQW51 cCBhcyB3aHkgSSB3b3VsZCBwcmVmZXIgY29uZmlnIG9wdGlvbnMuIEl0Cj4gPiBqdXN0IGNvbWVz IGRvd24gdG8gY29uZmlnIG9wdGlvbnMgYmVpbmcgcmVxdWlyZWQgdG8gZW5hYmxlIGNvbXBpbGVy Cj4gPiBmZWF0dXJlcy4gVGhlIGtlcm5lbCBpcyBvbmx5IGJ1aWx0IHdpdGggcnY2NGdjIGFuZCB1 c2FnZSBvZiBhbGwgb3RoZXIKPiA+IGV4dGVuc2lvbnMgcmVxdWlyZXMgaGFuZCB3cml0dGVuIGFz c2VtYmx5LiBUaGVyZSBhcmUgZWFzeSBwZXJmb3JtYW5jZQo+ID4gZ2FpbnMgd2hlbiBjb21waWxp bmcgdGhlIGtlcm5lbCB3aXRoIHJ2NjRnY196YmFfemJiX3pia2IgZXRjLgo+ID4gUGVyZm9ybWFu Y2UgZm9jdXNlZCBrZXJuZWxzIHdpbGwgbmVlZCB0byBiZSByZWNvbXBpbGVkIGFueXdheSBzbyBJ IGFtIG9mCj4gPiB0aGUgb3BpbmlvbiB0aGF0IGdyb3VwaW5nIGluIG90aGVyIHBlcmZvcm1hbmNl IGZlYXR1cmVzIGFzIGNvbmZpZwo+ID4gb3B0aW9ucyBsaWtlIHRoaXMgaXMgdGhlIGVhc2llc3Qg dGhpbmcgdG8gZG8gYW5kIHJlZHVjZXMgdGhlIGFtb3VudCBvZgo+ID4gY29kZSBpbiB0aGUga2Vy bmVsLgo+IAo+IEFzIGFuc3dlcmVkIG9uIHRoZSBvdGhlciB0aHJlYWQsIHRvdGFsbHkgYWdyZWUs IGV4Y2VwdCBmb3IgdGhlCj4gbWlzYWxpZ25lZCBhY2Nlc3NlcyBwcm9iaW5nIGNvbmZpZyBvcHRp b25zIDspLgoKT2ghIEkgaGF2ZSBtaXNzZWQgdGhhdCByZXNwb25zZSwgd2hlcmUgaXMgdGhhdD8K Cj4gVWx0aW1hdGVseSwgd2UgbmVlZAo+IHByb2ZpbGVzIGNvbmZpZ3VyYXRpb24sIGVpdGhlciB2 aWEgZGVmY29uZmlncyB0aGF0IGVuYWJsZXMgYSBidW5jaCBvZgo+IG9wdGltaXphdGlvbiB2aWEg SVNBIGV4dGVuc2lvbiBvciBjb25maWd1cmF0aW9uIG9wdGlvbnMgdGhhdCBncm91cHMKPiB0aGVz ZSBjb25maWcgb3B0aW9ucy4KCldoeSBkbyB5b3UgYWdyZWUgd2l0aCBwcm9maWxlIGNvbmZpZ3Mg Zm9yIG90aGVyIHRoaW5ncyBidXQgbm90IGZvcgptaXNhbGlnbmVkIGFjY2VzcyBwcm9iaW5nPwoK PiAKPiBDbMOpbWVudAo+IAo+ID4gCj4gPiAtIENoYXJsaWUKPiA+IAo+ID4+Cj4gPj4gQ2zDqW1l bnQKPiA+Pgo+ID4+Pgo+ID4+PiAtIENoYXJsaWUKPiA+Pj4KPiA+Pj4+IC19Cj4gPj4+PiAtI2Vs c2UgLyogQ09ORklHX1JJU0NWX1BST0JFX1VOQUxJR05FRF9BQ0NFU1MgKi8KPiA+Pj4+IC1zdGF0 aWMgdm9pZCBfX2luaXQgY2hlY2tfdW5hbGlnbmVkX2FjY2Vzc19zcGVlZF9hbGxfY3B1cyh2b2lk KQo+ID4+Pj4gLXsKPiA+Pj4+IC19Cj4gPj4+PiAtI2VuZGlmCj4gPj4+PiAtCj4gPj4+PiAgI2lm ZGVmIENPTkZJR19SSVNDVl9QUk9CRV9WRUNUT1JfVU5BTElHTkVEX0FDQ0VTUwo+ID4+Pj4gIHN0 YXRpYyB2b2lkIGNoZWNrX3ZlY3Rvcl91bmFsaWduZWRfYWNjZXNzKHN0cnVjdCB3b3JrX3N0cnVj dCAqd29yayBfX2Fsd2F5c191bnVzZWQpCj4gPj4+PiAgewo+ID4+Pj4gQEAgLTM3MCw2ICszODAs MTEgQEAgc3RhdGljIGludCBfX2luaXQgdmVjX2NoZWNrX3VuYWxpZ25lZF9hY2Nlc3Nfc3BlZWRf YWxsX2NwdXModm9pZCAqdW51c2VkIF9fYWx3YXkKPiA+Pj4+ICB9Cj4gPj4+PiAgI2VuZGlmCj4g Pj4+PiAgCj4gPj4+PiArc3RhdGljIGJvb2wgY2hlY2tfdmVjdG9yX3VuYWxpZ25lZF9hY2Nlc3Nf dGFibGUodm9pZCkKPiA+Pj4+ICt7Cj4gPj4+PiArCXJldHVybiBmYWxzZTsKPiA+Pj4+ICt9Cj4g Pj4+PiArCj4gPj4+PiAgc3RhdGljIGludCByaXNjdl9vbmxpbmVfY3B1X3ZlYyh1bnNpZ25lZCBp bnQgY3B1KQo+ID4+Pj4gIHsKPiA+Pj4+ICAJaWYgKCFoYXNfdmVjdG9yKCkpIHsKPiA+Pj4+IEBA IC0zNzcsNiArMzkyLDkgQEAgc3RhdGljIGludCByaXNjdl9vbmxpbmVfY3B1X3ZlYyh1bnNpZ25l ZCBpbnQgY3B1KQo+ID4+Pj4gIAkJcmV0dXJuIDA7Cj4gPj4+PiAgCX0KPiA+Pj4+ICAKPiA+Pj4+ ICsJaWYgKGNoZWNrX3ZlY3Rvcl91bmFsaWduZWRfYWNjZXNzX3RhYmxlKCkpCj4gPj4+PiArCQly ZXR1cm4gMDsKPiA+Pj4+ICsKPiA+Pj4+ICAjaWZkZWYgQ09ORklHX1JJU0NWX1BST0JFX1ZFQ1RP Ul9VTkFMSUdORURfQUNDRVNTCj4gPj4+PiAgCWlmIChwZXJfY3B1KHZlY3Rvcl9taXNhbGlnbmVk X2FjY2VzcywgY3B1KSAhPSBSSVNDVl9IV1BST0JFX01JU0FMSUdORURfVkVDVE9SX1VOS05PV04p Cj4gPj4+PiAgCQlyZXR1cm4gMDsKPiA+Pj4+IEBAIC0zOTIsMTMgKzQxMCwxNSBAQCBzdGF0aWMg aW50IF9faW5pdCBjaGVja191bmFsaWduZWRfYWNjZXNzX2FsbF9jcHVzKHZvaWQpCj4gPj4+PiAg ewo+ID4+Pj4gIAlpbnQgY3B1Owo+ID4+Pj4gIAo+ID4+Pj4gLQlpZiAoIWNoZWNrX3VuYWxpZ25l ZF9hY2Nlc3NfZW11bGF0ZWRfYWxsX2NwdXMoKSkKPiA+Pj4+ICsJaWYgKCFjaGVja191bmFsaWdu ZWRfYWNjZXNzX3RhYmxlKCkgJiYKPiA+Pj4+ICsJICAgICFjaGVja191bmFsaWduZWRfYWNjZXNz X2VtdWxhdGVkX2FsbF9jcHVzKCkpCj4gPj4+PiAgCQljaGVja191bmFsaWduZWRfYWNjZXNzX3Nw ZWVkX2FsbF9jcHVzKCk7Cj4gPj4+PiAgCj4gPj4+PiAgCWlmICghaGFzX3ZlY3RvcigpKSB7Cj4g Pj4+PiAgCQlmb3JfZWFjaF9vbmxpbmVfY3B1KGNwdSkKPiA+Pj4+ICAJCQlwZXJfY3B1KHZlY3Rv cl9taXNhbGlnbmVkX2FjY2VzcywgY3B1KSA9IFJJU0NWX0hXUFJPQkVfTUlTQUxJR05FRF9WRUNU T1JfVU5TVVBQT1JURUQ7Cj4gPj4+PiAtCX0gZWxzZSBpZiAoIWNoZWNrX3ZlY3Rvcl91bmFsaWdu ZWRfYWNjZXNzX2VtdWxhdGVkX2FsbF9jcHVzKCkgJiYKPiA+Pj4+ICsJfSBlbHNlIGlmICghY2hl Y2tfdmVjdG9yX3VuYWxpZ25lZF9hY2Nlc3NfdGFibGUoKSAmJgo+ID4+Pj4gKwkJICAgIWNoZWNr X3ZlY3Rvcl91bmFsaWduZWRfYWNjZXNzX2VtdWxhdGVkX2FsbF9jcHVzKCkgJiYKPiA+Pj4+ICAJ CSAgIElTX0VOQUJMRUQoQ09ORklHX1JJU0NWX1BST0JFX1ZFQ1RPUl9VTkFMSUdORURfQUNDRVNT KSkgewo+ID4+Pj4gIAkJa3RocmVhZF9ydW4odmVjX2NoZWNrX3VuYWxpZ25lZF9hY2Nlc3Nfc3Bl ZWRfYWxsX2NwdXMsCj4gPj4+PiAgCQkJICAgIE5VTEwsICJ2ZWNfY2hlY2tfdW5hbGlnbmVkX2Fj Y2Vzc19zcGVlZF9hbGxfY3B1cyIpOwo+ID4+Pgo+ID4+Pj4KPiA+Pj4+IFJlZ2FyZGluZyB5b3Vy IHRhYmxlLCBpdCBmZWVscyBsaWtlIGEgYml0IGdvaW5nIGJhY2sgdG8gb2xkIGhhcmRjb2RlZAo+ ID4+Pj4gcGxhdGZvcm0gZGVzY3JpcHRpb24gOykuIEkgdGhpbmsgc29tZSBraW5kIG9mIGF1dG8t ZGV0ZWN0aW9uIG9mIHNwZWVkCj4gPj4+PiAobm90IGJ1aWx0aW4gdGhlIGtlcm5lbCkgZm9yIHBs YXRmb3JtcyBjb3VsZCBiZSBnb29kIGFzIHdlbGwgdG8gc2tpcAo+ID4+Pj4gcHJvYmluZy4KPiA+ Pj4+Cj4gPj4+PiBBIERUIHByb3BlcnR5IGFsc28gc2VlbXMgb2sgdG8gbWUgc2luY2UgdGhlIGdv YWwgaXMgdG8gZGVzY3JpYmUKPiA+Pj4+IGhhcmR3YXJlLiBXb3VsZCBhIGNvbW1vbiBEVC9BQ1BJ IHByb3BlcnR5IGJlIGFwcHJvcHJpYXRlID8gVGhlCj4gPj4+PiBkZXZpY2VfcHJvcGVydHkgQVBJ IHVuaWZpZWQgYm90aCBzbyBpZiB3ZSB1c2VkIHNvbWUgY29tbW9uIHByb3BlcnR5IHRvCj4gPj4+ PiBkZXNjcmliZSB0aGUgbWlzYWxpZ25lZCBhY2Nlc3Mgc3BlZWQgKGJvdGggaW4gRFQgY3B1IG5v ZGUvIEFDUEkgQ1BVCj4gPj4+PiBkZXZpY2UgcGFja2FnZSksIHdlIGNvdWxkIGtlZXAgYSBzaW5n bGUgcGFyc2luZyBtZXRob2QuIEJ1dCBJJ20gbm8gQUNQSQo+ID4+Pj4gZXhwZXJ0IHNvIEkgZG9u J3Qga25vdyBpZiB0aGF0IHJlYWxseSBtYWtlIHNlbnNlLgo+ID4+Pj4KPiA+Pj4+IFRoYW5rcywK PiA+Pj4+Cj4gPj4+PiBDbMOpbWVudAo+ID4+Pj4KPiA+Pj4+Pgo+ID4+Pj4+IFRoYW5rcywKPiA+ Pj4+PiBkcmV3Cj4gPj4+Pgo+ID4+Cj4gCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fXwpsaW51eC1yaXNjdiBtYWlsaW5nIGxpc3QKbGludXgtcmlzY3ZAbGlz dHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3Rp 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<20250210-e6a2dfcd7995ffc8a6d918e4@orel> <015a8a52-6a49-41b9-95b4-5e8260d45776@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Mon, Feb 10, 2025 at 09:57:26PM +0100, Clément Léger wrote: > > > On 10/02/2025 21:53, Charlie Jenkins wrote: > > On Mon, Feb 10, 2025 at 09:42:25PM +0100, Clément Léger wrote: > >> > >> > >> On 10/02/2025 18:20, Charlie Jenkins wrote: > >>> On Mon, Feb 10, 2025 at 03:20:34PM +0100, Clément Léger wrote: > >>>> > >>>> > >>>> On 10/02/2025 15:06, Andrew Jones wrote: > >>>>> On Mon, Feb 10, 2025 at 12:07:40PM +0100, Clément Léger wrote: > >>>>>> > >>>>>> > >>>>>> On 10/02/2025 11:16, Anup Patel wrote: > >>>>>>> On Sat, Feb 8, 2025 at 6:53 AM Charlie Jenkins wrote: > >>>>>>>> > >>>>>>>> On Fri, Feb 07, 2025 at 05:19:47PM +0100, Andrew Jones wrote: > >>>>>>>>> Probing unaligned accesses on boot is time consuming. Provide a > >>>>>>>>> function which will be used to look up the access type in a table > >>>>>>>>> by id registers. Vendors which provide table entries can then skip > >>>>>>>>> the probing. > >>>>>>>> > >>>>>>>> The access checker in my experience is only time consuming on slow > >>>>>>>> hardware. Hardware that supports fast unaligned accesses isn't really > >>>>>>>> impacted by this? Avoiding a list of hardware that has slow/fast > >>>>>>>> unaligned accesses in the kernel was the main reason for dynamically > >>>>>>>> checking. We did introduce the config option to compile the kernel with > >>>>>>>> assumed slow/fast accesses, which of course has the downside of > >>>>>>>> recompiling the kernel and I assume that you already considered that. > >>>>>>> > >>>>>>> The kconfig option does not align with the vision of running the same > >>>>>>> kernel image across platforms. > >>>>>> > >>>>>> I'd would be advocating to remove compile time options as well and use > >>>>>> another way to skip the probe (see below). > >>>>>> > >>>>>>> > >>>>>>>> > >>>>>>>> Instead of having a table in the kernel, something that would be more > >>>>>>>> platform agnostic would be to have an extension that signals this > >>>>>>>> information. That seems like it would accomplish the same goal and > >>>>>>>> leverage the existing infrastructure in the kernel, albeit with the need > >>>>>>>> to make a new extension. > >>>>>>>> > >>>>>>> > >>>>>>> IMO, expecting an ISA extension to be defined for all possible > >>>>>>> microarchitectural choices is not going to scale so it is better > >>>>>>> to have infrastructure in kernel itself to infer microarchitectural > >>>>>>> choices based on RISC-V implementation ID. > >>>>>> > >>>>>> Since adding an extension seems quite unlikely, and that a device-tree > >>>>>> property is likely DT centric and not applicable to ACPI as well, was a > >>>>>> command line argument considered ? > >>>>>> > >>>>> > >>>>> I did consider adding a command line option in addition to the table, > >>>>> allowing platforms which neither have a table entry [yet] nor want to do > >>>>> the speed test, to set whatever they like. In the end, I dropped it, since > >>>>> I don't have a use case at this time. However, if we really don't want a > >>>>> table, then I can look into the command line option instead. > >>>> > >>>> Sorry if I wasn't clear, I wasn't considering this as a replacement for > >>>> your table but rather as a replacement to Charlie's compile time define > >>>> to skip misaligned speed probing since it is like "lpj=". You can > >>>> specify it on command line if you want to skip the loop time detection > >>>> of loops per jiffies and have faster boot. > >>> > >>> Jesse sent out a patch for a kernel parameter to set the access speed to > >>> whatever is desired [1]. > >> > >> Hey Charlie, > >> > >> Thanks but it seems you forgot to add the link ? > > > > Oops, I frequently do that... > > > > https://lore.kernel.org/linux-riscv/20240805173816.3722002-1-jesse@rivosinc.com/ > > > >> > >> Having configuration option + command line option seems like something > >> particularly heavy for such feature. The ifdefery/config options > >> involved in the misaligned probing code is already quite complicated. If > >> another mean to specify the misaligned speed access is added, I think > >> all configuration options to set the speed of accesses can then be > >> removed and just keep the command line. That will certainly simplify the > >> ifdef/config options. > > > > Yeah that's why it didn't get merged because it felt like overkill. I > > responded on the thread to Anup as why I would prefer config options. It > > just comes down to config options being required to enable compiler > > features. The kernel is only built with rv64gc and usage of all other > > extensions requires hand written assembly. There are easy performance > > gains when compiling the kernel with rv64gc_zba_zbb_zbkb etc. > > Performance focused kernels will need to be recompiled anyway so I am of > > the opinion that grouping in other performance features as config > > options like this is the easiest thing to do and reduces the amount of > > code in the kernel. > > As answered on the other thread, totally agree, except for the > misaligned accesses probing config options ;). Oh! I have missed that response, where is that? > Ultimately, we need > profiles configuration, either via defconfigs that enables a bunch of > optimization via ISA extension or configuration options that groups > these config options. Why do you agree with profile configs for other things but not for misaligned access probing? > > Clément > > > > > - Charlie > > > >> > >> Clément > >> > >>> > >>> - Charlie > >>> > >>>> -} > >>>> -#else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */ > >>>> -static void __init check_unaligned_access_speed_all_cpus(void) > >>>> -{ > >>>> -} > >>>> -#endif > >>>> - > >>>> #ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS > >>>> static void check_vector_unaligned_access(struct work_struct *work __always_unused) > >>>> { > >>>> @@ -370,6 +380,11 @@ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway > >>>> } > >>>> #endif > >>>> > >>>> +static bool check_vector_unaligned_access_table(void) > >>>> +{ > >>>> + return false; > >>>> +} > >>>> + > >>>> static int riscv_online_cpu_vec(unsigned int cpu) > >>>> { > >>>> if (!has_vector()) { > >>>> @@ -377,6 +392,9 @@ static int riscv_online_cpu_vec(unsigned int cpu) > >>>> return 0; > >>>> } > >>>> > >>>> + if (check_vector_unaligned_access_table()) > >>>> + return 0; > >>>> + > >>>> #ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS > >>>> if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) > >>>> return 0; > >>>> @@ -392,13 +410,15 @@ static int __init check_unaligned_access_all_cpus(void) > >>>> { > >>>> int cpu; > >>>> > >>>> - if (!check_unaligned_access_emulated_all_cpus()) > >>>> + if (!check_unaligned_access_table() && > >>>> + !check_unaligned_access_emulated_all_cpus()) > >>>> check_unaligned_access_speed_all_cpus(); > >>>> > >>>> if (!has_vector()) { > >>>> for_each_online_cpu(cpu) > >>>> per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED; > >>>> - } else if (!check_vector_unaligned_access_emulated_all_cpus() && > >>>> + } else if (!check_vector_unaligned_access_table() && > >>>> + !check_vector_unaligned_access_emulated_all_cpus() && > >>>> IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) { > >>>> kthread_run(vec_check_unaligned_access_speed_all_cpus, > >>>> NULL, "vec_check_unaligned_access_speed_all_cpus"); > >>> > >>>> > >>>> Regarding your table, it feels like a bit going back to old hardcoded > >>>> platform description ;). I think some kind of auto-detection of speed > >>>> (not builtin the kernel) for platforms could be good as well to skip > >>>> probing. > >>>> > >>>> A DT property also seems ok to me since the goal is to describe > >>>> hardware. Would a common DT/ACPI property be appropriate ? The > >>>> device_property API unified both so if we used some common property to > >>>> describe the misaligned access speed (both in DT cpu node/ ACPI CPU > >>>> device package), we could keep a single parsing method. But I'm no ACPI > >>>> expert so I don't know if that really make sense. > >>>> > >>>> Thanks, > >>>> > >>>> Clément > >>>> > >>>>> > >>>>> Thanks, > >>>>> drew > >>>> > >> >