From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: linux-clk@vger.kernel.org, sboyd@kernel.org,
mturquette@baylibre.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, matthias.bgg@gmail.com,
angelogioacchino.delregno@collabora.com, p.zabel@pengutronix.de,
linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
yangshiji66@outlook.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 6/6] mips: dts: ralink: mt7628a: update system controller node and its consumers
Date: Fri, 21 Feb 2025 18:18:32 +0100 [thread overview]
Message-ID: <Z7i1aDGiHLsOFYyz@alpha.franken.de> (raw)
In-Reply-To: <20250120092146.471951-7-sergio.paracuellos@gmail.com>
On Mon, Jan 20, 2025 at 10:21:46AM +0100, Sergio Paracuellos wrote:
> Current MT7628A device tree file system controller node is wrong since it is
> not matching bindings. Hence, update it to match current bindings updating
> it also to use new introduced clock constants.
>
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> ---
> arch/mips/boot/dts/ralink/mt7628a.dtsi | 38 ++++++++++++++++----------
> 1 file changed, 24 insertions(+), 14 deletions(-)
>
> diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi b/arch/mips/boot/dts/ralink/mt7628a.dtsi
> index 45a15e005cc4..309966049c56 100644
> --- a/arch/mips/boot/dts/ralink/mt7628a.dtsi
> +++ b/arch/mips/boot/dts/ralink/mt7628a.dtsi
> @@ -1,4 +1,5 @@
> // SPDX-License-Identifier: GPL-2.0
> +#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
>
> / {
> #address-cells = <1>;
> @@ -16,11 +17,6 @@ cpu@0 {
> };
> };
>
> - resetc: reset-controller {
> - compatible = "ralink,rt2880-reset";
> - #reset-cells = <1>;
> - };
> -
> cpuintc: interrupt-controller {
> #address-cells = <0>;
> #interrupt-cells = <1>;
> @@ -36,9 +32,11 @@ palmbus@10000000 {
> #address-cells = <1>;
> #size-cells = <1>;
>
> - sysc: system-controller@0 {
> - compatible = "ralink,mt7620a-sysc", "syscon";
> + sysc: syscon@0 {
> + compatible = "ralink,mt7628-sysc", "syscon";
> reg = <0x0 0x60>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> };
>
> pinmux: pinmux@60 {
> @@ -138,7 +136,7 @@ watchdog: watchdog@100 {
> compatible = "mediatek,mt7621-wdt";
> reg = <0x100 0x30>;
>
> - resets = <&resetc 8>;
> + resets = <&sysc 8>;
> reset-names = "wdt";
>
> interrupt-parent = <&intc>;
> @@ -154,7 +152,7 @@ intc: interrupt-controller@200 {
> interrupt-controller;
> #interrupt-cells = <1>;
>
> - resets = <&resetc 9>;
> + resets = <&sysc 9>;
> reset-names = "intc";
>
> interrupt-parent = <&cpuintc>;
> @@ -190,7 +188,9 @@ spi: spi@b00 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinmux_spi_spi>;
>
> - resets = <&resetc 18>;
> + clocks = <&sysc MT76X8_CLK_SPI1>;
> +
> + resets = <&sysc 18>;
> reset-names = "spi";
>
> #address-cells = <1>;
> @@ -206,7 +206,9 @@ i2c: i2c@900 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinmux_i2c_i2c>;
>
> - resets = <&resetc 16>;
> + clocks = <&sysc MT76X8_CLK_I2C>;
> +
> + resets = <&sysc 16>;
> reset-names = "i2c";
>
> #address-cells = <1>;
> @@ -222,7 +224,9 @@ uart0: uartlite@c00 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinmux_uart0_uart>;
>
> - resets = <&resetc 12>;
> + clocks = <&sysc MT76X8_CLK_UART0>;
> +
> + resets = <&sysc 12>;
> reset-names = "uart0";
>
> interrupt-parent = <&intc>;
> @@ -238,7 +242,9 @@ uart1: uart1@d00 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinmux_uart1_uart>;
>
> - resets = <&resetc 19>;
> + clocks = <&sysc MT76X8_CLK_UART1>;
> +
> + resets = <&sysc 19>;
> reset-names = "uart1";
>
> interrupt-parent = <&intc>;
> @@ -254,7 +260,9 @@ uart2: uart2@e00 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinmux_uart2_uart>;
>
> - resets = <&resetc 20>;
> + clocks = <&sysc MT76X8_CLK_UART2>;
> +
> + resets = <&sysc 20>;
> reset-names = "uart2";
>
> interrupt-parent = <&intc>;
> @@ -290,6 +298,8 @@ wmac: wmac@10300000 {
> compatible = "mediatek,mt7628-wmac";
> reg = <0x10300000 0x100000>;
>
> + clocks = <&sysc MT76X8_CLK_WMAC>;
> +
> interrupt-parent = <&cpuintc>;
> interrupts = <6>;
>
> --
> 2.25.1
I get
DTC arch/mips/boot/dts/ralink/vocore2.dtb
/local/tbogendoerfer/korg/linux/arch/mips/boot/dts/ralink/mt7628a.dtsi:275.28-284.4: ERROR (phandle_references): /usb-phy@10120000: Reference to non-existent node or label "resetc"
/local/tbogendoerfer/korg/linux/arch/mips/boot/dts/ralink/mt7628a.dtsi:275.28-284.4: ERROR (phandle_references): /usb-phy@10120000: Reference to non-existent node or label "resetc"
ERROR: Input tree has errors, aborting (use -f to force output)
for CONFIG_DTB_VOCORE2=y and a similair failure for CONFIG_DTB_OMEGA2P=y
I'll apply rest of the series, please send a fixed patch for mt7628a
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2025-02-21 17:19 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-20 9:21 [PATCH v3 0/6] mips: dts: ralink: update system controller nodes and its consumers Sergio Paracuellos
2025-01-20 9:21 ` [PATCH v3 1/6] dt-bindings: clock: add clock definitions for Ralink SoCs Sergio Paracuellos
2025-01-20 16:46 ` Krzysztof Kozlowski
2025-01-21 20:35 ` Stephen Boyd
2025-01-20 9:21 ` [PATCH v3 2/6] mips: dts: ralink: rt2880: update system controller node and its consumers Sergio Paracuellos
2025-01-20 9:21 ` [PATCH v3 3/6] mips: dts: ralink: rt3050: " Sergio Paracuellos
2025-01-20 9:21 ` [PATCH v3 4/6] mips: dts: ralink: rt3883: " Sergio Paracuellos
2025-01-20 9:21 ` [PATCH v3 5/6] mips: dts: ralink: mt7620a: " Sergio Paracuellos
2025-01-20 9:21 ` [PATCH v3 6/6] mips: dts: ralink: mt7628a: " Sergio Paracuellos
2025-02-21 17:18 ` Thomas Bogendoerfer [this message]
2025-02-21 17:31 ` Sergio Paracuellos
[not found] ` <CAMhs-H-VevC+_=HxhMU6-at0bKut_JqdgO7j2detuB4s8R_QFQ@mail.gmail.com>
2025-02-21 14:03 ` [PATCH v3 0/6] mips: dts: ralink: update system controller nodes " Thomas Bogendoerfer
2025-02-21 14:50 ` Sergio Paracuellos
2025-02-21 15:36 ` Thomas Bogendoerfer
2025-02-21 16:40 ` Sergio Paracuellos
2025-02-21 17:01 ` Thomas Bogendoerfer
2025-02-21 17:18 ` Thomas Bogendoerfer
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