Hey Linus, Please pull to receive a bunch of small fixes for Generic phy subsystem. Small driver fixes in bunch of drivers for this cycle. The following changes since commit 2014c95afecee3e76ca4a56956a936e23283f05b: Linux 6.14-rc1 (2025-02-02 15:39:26 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git tags/phy-fixes-6.14 for you to fetch changes up to 55f1a5f7c97c3c92ba469e16991a09274410ceb7: phy: tegra: xusb: reset VBUS & ID OVERRIDE (2025-02-14 18:03:05 +0530) ---------------------------------------------------------------- phy fixes for 6.14 - rockchip phy kconfig dependency fix with USB_COMMON and regression fix for old DT - stm32 phy overflow assertion fix - exonysfs phy refclk masks fix and power gate on exit fix - freescale fix for clock dividor valid range - TI regmap syscon register fix - tegra reset registers on init fix ---------------------------------------------------------------- Andrew Davis (1): phy: ti: gmii-sel: Do not use syscon helper to build regmap André Draszik (1): phy: exynos5-usbdrd: gs101: ensure power is gated to SS phy in phy_exit() Arnd Bergmann (1): phy: rockchip: fix Kconfig dependency more BH Hsieh (1): phy: tegra: xusb: reset VBUS & ID OVERRIDE Christian Bruel (1): phy: stm32: Fix constant-value overflow assertion Chukun Pan (1): phy: rockchip: naneng-combphy: compatible reset with old DT Kaustabh Chakraborty (1): phy: exynos5-usbdrd: fix MPLL_MULTIPLIER and SSC_REFCLKSEL masks in refclk Pei Xiao (1): phy: freescale: fsl-samsung-hdmi: Limit PLL lock detection clock divider to valid range drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 13 ++++++-- drivers/phy/rockchip/Kconfig | 1 + drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 5 ++- drivers/phy/samsung/phy-exynos5-usbdrd.c | 25 +++++++------- drivers/phy/st/phy-stm32-combophy.c | 38 ++++++++++------------ drivers/phy/tegra/xusb-tegra186.c | 11 +++++++ drivers/phy/ti/phy-gmii-sel.c | 15 ++++++++- 7 files changed, 73 insertions(+), 35 deletions(-) -- ~Vinod