* [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
@ 2025-03-04 20:00 Matt Atwood
2025-03-04 22:08 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 14+ messages in thread
From: Matt Atwood @ 2025-03-04 20:00 UTC (permalink / raw)
To: intel-gfx; +Cc: suraj.kandpal, Matt Atwood
From: Suraj Kandpal <suraj.kandpal@intel.com>
We only support resolution upto 4k for single pipe when using
YUV420 format so we prune these modes and restrict the plane size
at src.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 205ec315b413..8bccc6e0b5b3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1396,6 +1396,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
struct intel_display *display = to_intel_display(_connector->dev);
struct intel_connector *connector = to_intel_connector(_connector);
struct intel_dp *intel_dp = intel_attached_dp(connector);
+ enum intel_output_format sink_format;
const struct drm_display_mode *fixed_mode;
int target_clock = mode->clock;
int max_rate, mode_rate, max_lanes, max_link_clock;
@@ -1429,6 +1430,13 @@ intel_dp_mode_valid(struct drm_connector *_connector,
mode->hdisplay, target_clock);
max_dotclk *= num_joined_pipes;
+ sink_format = intel_dp_sink_format(connector, mode);
+ if (num_joined_pipes == 1) {
+ if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
+ mode->hdisplay > 4096)
+ return MODE_NO_420;
+ }
+
if (target_clock > max_dotclk)
return MODE_CLOCK_HIGH;
@@ -1444,10 +1452,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
intel_dp_mode_min_output_bpp(connector, mode));
if (intel_dp_has_dsc(connector)) {
- enum intel_output_format sink_format, output_format;
+ enum intel_output_format output_format;
int pipe_bpp;
- sink_format = intel_dp_sink_format(connector, mode);
output_format = intel_dp_output_format(connector, sink_format);
/*
* TBD pass the connector BPC,
--
2.45.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/xe3lpd: Prune modes for YUV420
2025-03-04 20:00 [PATCH] drm/i915/xe3lpd: Prune modes for YUV420 Matt Atwood
@ 2025-03-04 22:08 ` Patchwork
2025-03-04 22:26 ` ✗ i915.CI.BAT: failure " Patchwork
2025-03-05 13:32 ` [PATCH] " Ville Syrjälä
2 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-03-04 22:08 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/xe3lpd: Prune modes for YUV420
URL : https://patchwork.freedesktop.org/series/145801/
State : warning
== Summary ==
Error: dim checkpatch failed
85a77b13b4f6 drm/i915/xe3lpd: Prune modes for YUV420
-:6: WARNING:TYPO_SPELLING: 'upto' may be misspelled - perhaps 'up to'?
#6:
We only support resolution upto 4k for single pipe when using
^^^^
total: 0 errors, 1 warnings, 0 checks, 31 lines checked
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ i915.CI.BAT: failure for drm/i915/xe3lpd: Prune modes for YUV420
2025-03-04 20:00 [PATCH] drm/i915/xe3lpd: Prune modes for YUV420 Matt Atwood
2025-03-04 22:08 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2025-03-04 22:26 ` Patchwork
2025-03-05 13:32 ` [PATCH] " Ville Syrjälä
2 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-03-04 22:26 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 11517 bytes --]
== Series Details ==
Series: drm/i915/xe3lpd: Prune modes for YUV420
URL : https://patchwork.freedesktop.org/series/145801/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16222 -> Patchwork_145801v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_145801v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_145801v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/index.html
Participating hosts (44 -> 44)
------------------------------
Additional (1): bat-arlh-2
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_145801v1:
### IGT changes ###
#### Possible regressions ####
* igt@i915_module_load@reload:
- bat-apl-1: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16222/bat-apl-1/igt@i915_module_load@reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-apl-1/igt@i915_module_load@reload.html
Known issues
------------
Here are the changes found in Patchwork_145801v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-arlh-2: NOTRUN -> [SKIP][3] ([i915#11346] / [i915#9318])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@debugfs_test@basic-hwmon.html
* igt@fbdev@eof:
- bat-arlh-2: NOTRUN -> [SKIP][4] ([i915#11345] / [i915#11346]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@fbdev@eof.html
* igt@fbdev@info:
- bat-arlh-2: NOTRUN -> [SKIP][5] ([i915#11346] / [i915#1849])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@fbdev@info.html
- fi-kbl-8809g: NOTRUN -> [SKIP][6] ([i915#1849])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/fi-kbl-8809g/igt@fbdev@info.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g: NOTRUN -> [SKIP][7] ([i915#2190])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/fi-kbl-8809g/igt@gem_huc_copy@huc-copy.html
- fi-skl-6600u: NOTRUN -> [SKIP][8] ([i915#2190])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- bat-arlh-2: NOTRUN -> [SKIP][9] ([i915#10213] / [i915#11346] / [i915#11671]) +3 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-kbl-8809g: NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/fi-kbl-8809g/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_lmem_swapping@random-engines:
- fi-skl-6600u: NOTRUN -> [SKIP][11] ([i915#4613]) +3 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/fi-skl-6600u/igt@gem_lmem_swapping@random-engines.html
* igt@gem_mmap@basic:
- bat-arlh-2: NOTRUN -> [SKIP][12] ([i915#11343] / [i915#11346])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@gem_mmap@basic.html
* igt@gem_render_tiled_blits@basic:
- bat-arlh-2: NOTRUN -> [SKIP][13] ([i915#10197] / [i915#10211] / [i915#11346] / [i915#11725])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@gem_render_tiled_blits@basic.html
* igt@gem_tiled_blits@basic:
- bat-arlh-2: NOTRUN -> [SKIP][14] ([i915#11346] / [i915#12637]) +4 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@gem_tiled_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-arlh-2: NOTRUN -> [SKIP][15] ([i915#10206] / [i915#11346] / [i915#11724])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rpm@module-reload:
- bat-adls-6: [PASS][16] -> [FAIL][17] ([i915#13633])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16222/bat-adls-6/igt@i915_pm_rpm@module-reload.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-adls-6/igt@i915_pm_rpm@module-reload.html
- bat-rpls-4: [PASS][18] -> [FAIL][19] ([i915#13633])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16222/bat-rpls-4/igt@i915_pm_rpm@module-reload.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-rpls-4/igt@i915_pm_rpm@module-reload.html
* igt@i915_pm_rps@basic-api:
- bat-arlh-2: NOTRUN -> [SKIP][20] ([i915#10209] / [i915#11346] / [i915#11681])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [PASS][21] -> [INCOMPLETE][22] ([i915#12445]) +1 other test incomplete
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16222/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-arlh-2: NOTRUN -> [SKIP][23] ([i915#10200] / [i915#11346] / [i915#11666] / [i915#12203])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-arlh-2: NOTRUN -> [SKIP][24] ([i915#10200] / [i915#11346] / [i915#11666]) +8 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-8809g: NOTRUN -> [SKIP][25] +34 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/fi-kbl-8809g/igt@kms_dsc@dsc-basic.html
- fi-skl-6600u: NOTRUN -> [SKIP][26] +9 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/fi-skl-6600u/igt@kms_dsc@dsc-basic.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: [PASS][27] -> [SKIP][28] ([i915#9197]) +3 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16222/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_psr@psr-primary-page-flip:
- bat-arlh-2: NOTRUN -> [SKIP][29] ([i915#11346]) +32 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-arlh-2: NOTRUN -> [SKIP][30] ([i915#10208] / [i915#11346] / [i915#8809])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-arlh-2: NOTRUN -> [SKIP][31] ([i915#10212] / [i915#11346] / [i915#11726])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-read:
- bat-arlh-2: NOTRUN -> [SKIP][32] ([i915#10214] / [i915#11346] / [i915#11726])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-write:
- bat-arlh-2: NOTRUN -> [SKIP][33] ([i915#10216] / [i915#11346] / [i915#11723])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-arlh-2/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@i915_module_load@load:
- bat-mtlp-9: [DMESG-WARN][34] ([i915#13494]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16222/bat-mtlp-9/igt@i915_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/bat-mtlp-9/igt@i915_module_load@load.html
[i915#10197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10197
[i915#10200]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10200
[i915#10206]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10206
[i915#10208]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10208
[i915#10209]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10209
[i915#10211]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10211
[i915#10212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10212
[i915#10213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10213
[i915#10214]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10214
[i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216
[i915#11343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11343
[i915#11345]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11345
[i915#11346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11346
[i915#11666]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11666
[i915#11671]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11671
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#11723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11723
[i915#11724]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11724
[i915#11725]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11725
[i915#11726]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11726
[i915#12203]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12203
[i915#12445]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12445
[i915#12637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12637
[i915#13494]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13494
[i915#13633]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13633
[i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
[i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
[i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
Build changes
-------------
* Linux: CI_DRM_16222 -> Patchwork_145801v1
CI-20190529: 20190529
CI_DRM_16222: ff2d693d88726e29a1d87291105135c31c21fa26 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8258: ee442ca9711ab6ae1a1c0fc784d18bfaa6f9244f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_145801v1: ff2d693d88726e29a1d87291105135c31c21fa26 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145801v1/index.html
[-- Attachment #2: Type: text/html, Size: 14359 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
2025-03-04 20:00 [PATCH] drm/i915/xe3lpd: Prune modes for YUV420 Matt Atwood
2025-03-04 22:08 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2025-03-04 22:26 ` ✗ i915.CI.BAT: failure " Patchwork
@ 2025-03-05 13:32 ` Ville Syrjälä
2 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjälä @ 2025-03-05 13:32 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-gfx, suraj.kandpal
On Tue, Mar 04, 2025 at 12:00:31PM -0800, Matt Atwood wrote:
> From: Suraj Kandpal <suraj.kandpal@intel.com>
>
> We only support resolution upto 4k for single pipe when using
> YUV420 format so we prune these modes and restrict the plane size
> at src.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 205ec315b413..8bccc6e0b5b3 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1396,6 +1396,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> struct intel_display *display = to_intel_display(_connector->dev);
> struct intel_connector *connector = to_intel_connector(_connector);
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> + enum intel_output_format sink_format;
> const struct drm_display_mode *fixed_mode;
> int target_clock = mode->clock;
> int max_rate, mode_rate, max_lanes, max_link_clock;
> @@ -1429,6 +1430,13 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> mode->hdisplay, target_clock);
> max_dotclk *= num_joined_pipes;
>
> + sink_format = intel_dp_sink_format(connector, mode);
> + if (num_joined_pipes == 1) {
> + if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
sink_format is irrelevant. output_format is what matters.
> + mode->hdisplay > 4096)
> + return MODE_NO_420;
> + }
Which hardware limit are you actully trying to handle here?
> +
> if (target_clock > max_dotclk)
> return MODE_CLOCK_HIGH;
>
> @@ -1444,10 +1452,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> intel_dp_mode_min_output_bpp(connector, mode));
>
> if (intel_dp_has_dsc(connector)) {
> - enum intel_output_format sink_format, output_format;
> + enum intel_output_format output_format;
> int pipe_bpp;
>
> - sink_format = intel_dp_sink_format(connector, mode);
> output_format = intel_dp_output_format(connector, sink_format);
> /*
> * TBD pass the connector BPC,
> --
> 2.45.0
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
@ 2025-06-09 16:45 Suraj Kandpal
2025-06-09 17:20 ` Cavitt, Jonathan
2025-06-09 17:59 ` Ville Syrjälä
0 siblings, 2 replies; 14+ messages in thread
From: Suraj Kandpal @ 2025-06-09 16:45 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: ankit.k.nautiyal, Suraj Kandpal
We only support resolution up to 4k for single pipe when using
YUV420 format so we prune these modes and restrict the plane size
at src. This is because pipe scaling will not support YUV420 scaling
for hwidth > 4096.
--v2
-Use output format to check [Ville]
-Add Bspec references
-Modify commit messge to point to why this is needed
Bspec: 49247, 50441
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index d04609460e8c..2691eeb50a26 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1419,6 +1419,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
struct intel_display *display = to_intel_display(_connector->dev);
struct intel_connector *connector = to_intel_connector(_connector);
struct intel_dp *intel_dp = intel_attached_dp(connector);
+ enum intel_output_format sink_format, output_format;
const struct drm_display_mode *fixed_mode;
int target_clock = mode->clock;
int max_rate, mode_rate, max_lanes, max_link_clock;
@@ -1452,6 +1453,14 @@ intel_dp_mode_valid(struct drm_connector *_connector,
mode->hdisplay, target_clock);
max_dotclk *= num_joined_pipes;
+ sink_format = intel_dp_sink_format(connector, mode);
+ output_format = intel_dp_output_format(connector, sink_format);
+ if (num_joined_pipes == 1) {
+ if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
+ mode->hdisplay > 4096)
+ return MODE_NO_420;
+ }
+
if (target_clock > max_dotclk)
return MODE_CLOCK_HIGH;
@@ -1467,11 +1476,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
intel_dp_mode_min_output_bpp(connector, mode));
if (intel_dp_has_dsc(connector)) {
- enum intel_output_format sink_format, output_format;
int pipe_bpp;
- sink_format = intel_dp_sink_format(connector, mode);
- output_format = intel_dp_output_format(connector, sink_format);
/*
* TBD pass the connector BPC,
* for now U8_MAX so that max BPC on that platform would be picked
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* RE: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
2025-06-09 16:45 Suraj Kandpal
@ 2025-06-09 17:20 ` Cavitt, Jonathan
2025-06-09 17:59 ` Ville Syrjälä
1 sibling, 0 replies; 14+ messages in thread
From: Cavitt, Jonathan @ 2025-06-09 17:20 UTC (permalink / raw)
To: Kandpal, Suraj, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Kandpal, Suraj, Cavitt, Jonathan
-----Original Message-----
From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Suraj Kandpal
Sent: Monday, June 9, 2025 9:46 AM
To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Kandpal, Suraj <suraj.kandpal@intel.com>
Subject: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
>
> We only support resolution up to 4k for single pipe when using
> YUV420 format so we prune these modes and restrict the plane size
> at src. This is because pipe scaling will not support YUV420 scaling
> for hwidth > 4096.
>
> --v2
> -Use output format to check [Ville]
> -Add Bspec references
> -Modify commit messge to point to why this is needed
>
> Bspec: 49247, 50441
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index d04609460e8c..2691eeb50a26 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1419,6 +1419,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> struct intel_display *display = to_intel_display(_connector->dev);
> struct intel_connector *connector = to_intel_connector(_connector);
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> + enum intel_output_format sink_format, output_format;
> const struct drm_display_mode *fixed_mode;
> int target_clock = mode->clock;
> int max_rate, mode_rate, max_lanes, max_link_clock;
> @@ -1452,6 +1453,14 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> mode->hdisplay, target_clock);
> max_dotclk *= num_joined_pipes;
>
> + sink_format = intel_dp_sink_format(connector, mode);
> + output_format = intel_dp_output_format(connector, sink_format);
> + if (num_joined_pipes == 1) {
> + if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
> + mode->hdisplay > 4096)
> + return MODE_NO_420;
> + }
These nested if statements can probably be combined:
"""
if (num_joined_pipes == 1 &&
output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
mode->hdisplay > 4096)
return MODE_NO_420;
"""
However, I think this is a matter of style preference, so I won't block on it.
And if there's a practical reason the if statements are broken up like this, then
that's also good enough reason to leave it as is.
Otherwise:
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
-Jonathan Cavitt
> +
> if (target_clock > max_dotclk)
> return MODE_CLOCK_HIGH;
>
> @@ -1467,11 +1476,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> intel_dp_mode_min_output_bpp(connector, mode));
>
> if (intel_dp_has_dsc(connector)) {
> - enum intel_output_format sink_format, output_format;
> int pipe_bpp;
>
> - sink_format = intel_dp_sink_format(connector, mode);
> - output_format = intel_dp_output_format(connector, sink_format);
> /*
> * TBD pass the connector BPC,
> * for now U8_MAX so that max BPC on that platform would be picked
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
2025-06-09 16:45 Suraj Kandpal
2025-06-09 17:20 ` Cavitt, Jonathan
@ 2025-06-09 17:59 ` Ville Syrjälä
2025-06-11 1:10 ` Kandpal, Suraj
1 sibling, 1 reply; 14+ messages in thread
From: Ville Syrjälä @ 2025-06-09 17:59 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe, intel-gfx, ankit.k.nautiyal
On Mon, Jun 09, 2025 at 10:15:48PM +0530, Suraj Kandpal wrote:
> We only support resolution up to 4k for single pipe when using
> YUV420 format so we prune these modes and restrict the plane size
> at src. This is because pipe scaling will not support YUV420 scaling
> for hwidth > 4096.
>
> --v2
> -Use output format to check [Ville]
> -Add Bspec references
> -Modify commit messge to point to why this is needed
>
> Bspec: 49247, 50441
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index d04609460e8c..2691eeb50a26 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1419,6 +1419,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> struct intel_display *display = to_intel_display(_connector->dev);
> struct intel_connector *connector = to_intel_connector(_connector);
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> + enum intel_output_format sink_format, output_format;
> const struct drm_display_mode *fixed_mode;
> int target_clock = mode->clock;
> int max_rate, mode_rate, max_lanes, max_link_clock;
> @@ -1452,6 +1453,14 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> mode->hdisplay, target_clock);
> max_dotclk *= num_joined_pipes;
>
> + sink_format = intel_dp_sink_format(connector, mode);
> + output_format = intel_dp_output_format(connector, sink_format);
> + if (num_joined_pipes == 1) {
> + if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
> + mode->hdisplay > 4096)
Sprinkling random hw limits all over the codebase isn't a very good
approach. I think we want some kind of skl_scaler_mode_valid() for this.
And that should probably be routed via a intel_pfit_mode_valid() to keep
the level of abstraction similar to intel_pfit_compute_config().
> + return MODE_NO_420;
> + }
> +
> if (target_clock > max_dotclk)
> return MODE_CLOCK_HIGH;
>
> @@ -1467,11 +1476,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> intel_dp_mode_min_output_bpp(connector, mode));
>
> if (intel_dp_has_dsc(connector)) {
> - enum intel_output_format sink_format, output_format;
> int pipe_bpp;
>
> - sink_format = intel_dp_sink_format(connector, mode);
> - output_format = intel_dp_output_format(connector, sink_format);
> /*
> * TBD pass the connector BPC,
> * for now U8_MAX so that max BPC on that platform would be picked
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
2025-06-09 17:59 ` Ville Syrjälä
@ 2025-06-11 1:10 ` Kandpal, Suraj
0 siblings, 0 replies; 14+ messages in thread
From: Kandpal, Suraj @ 2025-06-11 1:10 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Nautiyal, Ankit K
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Monday, June 9, 2025 11:30 PM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>
> Cc: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Nautiyal,
> Ankit K <ankit.k.nautiyal@intel.com>
> Subject: Re: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
>
> On Mon, Jun 09, 2025 at 10:15:48PM +0530, Suraj Kandpal wrote:
> > We only support resolution up to 4k for single pipe when using
> > YUV420 format so we prune these modes and restrict the plane size at
> > src. This is because pipe scaling will not support YUV420 scaling for
> > hwidth > 4096.
> >
> > --v2
> > -Use output format to check [Ville]
> > -Add Bspec references
> > -Modify commit messge to point to why this is needed
> >
> > Bspec: 49247, 50441
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++++---
> > 1 file changed, 9 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index d04609460e8c..2691eeb50a26 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1419,6 +1419,7 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> > struct intel_display *display = to_intel_display(_connector->dev);
> > struct intel_connector *connector = to_intel_connector(_connector);
> > struct intel_dp *intel_dp = intel_attached_dp(connector);
> > + enum intel_output_format sink_format, output_format;
> > const struct drm_display_mode *fixed_mode;
> > int target_clock = mode->clock;
> > int max_rate, mode_rate, max_lanes, max_link_clock; @@ -1452,6
> > +1453,14 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> > mode->hdisplay,
> target_clock);
> > max_dotclk *= num_joined_pipes;
> >
> > + sink_format = intel_dp_sink_format(connector, mode);
> > + output_format = intel_dp_output_format(connector, sink_format);
> > + if (num_joined_pipes == 1) {
> > + if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
> > + mode->hdisplay > 4096)
>
> Sprinkling random hw limits all over the codebase isn't a very good approach.
> I think we want some kind of skl_scaler_mode_valid() for this.
> And that should probably be routed via a intel_pfit_mode_valid() to keep the
> level of abstraction similar to intel_pfit_compute_config().
Sure will fix this.
Regards,
Suraj Kandpal
>
> > + return MODE_NO_420;
> > + }
> > +
> > if (target_clock > max_dotclk)
> > return MODE_CLOCK_HIGH;
> >
> > @@ -1467,11 +1476,8 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> >
> intel_dp_mode_min_output_bpp(connector, mode));
> >
> > if (intel_dp_has_dsc(connector)) {
> > - enum intel_output_format sink_format, output_format;
> > int pipe_bpp;
> >
> > - sink_format = intel_dp_sink_format(connector, mode);
> > - output_format = intel_dp_output_format(connector,
> sink_format);
> > /*
> > * TBD pass the connector BPC,
> > * for now U8_MAX so that max BPC on that platform would
> be picked
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
@ 2025-06-17 4:43 Suraj Kandpal
2025-06-17 9:00 ` Jani Nikula
0 siblings, 1 reply; 14+ messages in thread
From: Suraj Kandpal @ 2025-06-17 4:43 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: ankit.k.nautiyal, Suraj Kandpal, Jonathan Cavitt
We only support resolution up to 4k for single pipe when using
YUV420 format so we prune these modes and restrict the plane size
at src. This is because pipe scaling will not support YUV420 scaling
for hwidth > 4096.
--v2
-Use output format to check [Ville]
-Add Bspec references
-Modify commit messge to point to why this is needed
--v3
-Use a function skl_scaler_mode_valid which is routed throug
intel_pfit_mode_valid [Ville]
-Combine the check conditons [Jonathan]
Bspec: 49247, 50441
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> #v2
---
drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++++---
drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +++
drivers/gpu/drm/i915/display/intel_pfit.c | 12 ++++++++++++
drivers/gpu/drm/i915/display/intel_pfit.h | 12 +++++++++++-
drivers/gpu/drm/i915/display/skl_scaler.c | 18 ++++++++++++++++++
drivers/gpu/drm/i915/display/skl_scaler.h | 12 ++++++++++++
6 files changed, 63 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 277b40b13948..7af936e6ea46 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1418,6 +1418,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
struct intel_display *display = to_intel_display(_connector->dev);
struct intel_connector *connector = to_intel_connector(_connector);
struct intel_dp *intel_dp = intel_attached_dp(connector);
+ enum intel_output_format sink_format, output_format;
const struct drm_display_mode *fixed_mode;
int target_clock = mode->clock;
int max_rate, mode_rate, max_lanes, max_link_clock;
@@ -1451,6 +1452,12 @@ intel_dp_mode_valid(struct drm_connector *_connector,
mode->hdisplay, target_clock);
max_dotclk *= num_joined_pipes;
+ sink_format = intel_dp_sink_format(connector, mode);
+ output_format = intel_dp_output_format(connector, sink_format);
+
+ if (!intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes, &status))
+ return status;
+
if (target_clock > max_dotclk)
return MODE_CLOCK_HIGH;
@@ -1466,11 +1473,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
intel_dp_mode_min_output_bpp(connector, mode));
if (intel_dp_has_dsc(connector)) {
- enum intel_output_format sink_format, output_format;
int pipe_bpp;
- sink_format = intel_dp_sink_format(connector, mode);
- output_format = intel_dp_output_format(connector, sink_format);
/*
* TBD pass the connector BPC,
* for now U8_MAX so that max BPC on that platform would be picked
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 9961ff259298..53ba1e16100d 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2053,6 +2053,9 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
else
sink_format = INTEL_OUTPUT_FORMAT_RGB;
+ if (!intel_pfit_mode_valid(display, mode, sink_format, 0, &status))
+ return status;
+
status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
if (status != MODE_OK) {
if (ycbcr_420_only ||
diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c b/drivers/gpu/drm/i915/display/intel_pfit.c
index 13541be4d6df..a8fb92c3417a 100644
--- a/drivers/gpu/drm/i915/display/intel_pfit.c
+++ b/drivers/gpu/drm/i915/display/intel_pfit.c
@@ -14,6 +14,7 @@
#include "intel_lvds_regs.h"
#include "intel_pfit.h"
#include "intel_pfit_regs.h"
+#include "skl_scaler.h"
static int intel_pch_pfit_check_dst_window(const struct intel_crtc_state *crtc_state)
{
@@ -546,6 +547,17 @@ static int gmch_panel_fitting(struct intel_crtc_state *crtc_state,
return intel_gmch_pfit_check_timings(crtc_state);
}
+bool
+intel_pfit_mode_valid(struct intel_display *display,
+ const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
+ int num_joined_pipes,
+ enum drm_mode_status *status)
+{
+ return skl_scaler_mode_valid(display, mode, output_format,
+ num_joined_pipes, status);
+}
+
int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_pfit.h b/drivers/gpu/drm/i915/display/intel_pfit.h
index ef34f9b49d09..ce68ceebc700 100644
--- a/drivers/gpu/drm/i915/display/intel_pfit.h
+++ b/drivers/gpu/drm/i915/display/intel_pfit.h
@@ -6,8 +6,14 @@
#ifndef __INTEL_PFIT_H__
#define __INTEL_PFIT_H__
+#include <linux/types.h>
+
+enum drm_mode_status;
+struct drm_display_mode;
struct drm_connector_state;
struct intel_crtc_state;
+struct intel_display;
+enum intel_output_format;
int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
@@ -17,5 +23,9 @@ void ilk_pfit_get_config(struct intel_crtc_state *crtc_state);
void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state);
void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state);
void i9xx_pfit_get_config(struct intel_crtc_state *crtc_state);
-
+bool intel_pfit_mode_valid(struct intel_display *display,
+ const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
+ int num_joined_pipes,
+ enum drm_mode_status *status);
#endif /* __INTEL_PFIT_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index d77798499c57..27001b52daf8 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -134,6 +134,24 @@ static void skl_scaler_max_dst_size(struct intel_crtc *crtc,
}
}
+bool
+skl_scaler_mode_valid(struct intel_display *display,
+ const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
+ int num_joined_pipes,
+ enum drm_mode_status *status)
+{
+ if (num_joined_pipes < 2 && output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+ if (DISPLAY_VER(display) >= 14 &&
+ mode->hdisplay > 4096) {
+ *status = MODE_NO_420;
+ return false;
+ }
+ }
+
+ return true;
+}
+
static int
skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
unsigned int scaler_user, int *scaler_id,
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index 355ea15260ca..37c6543b4731 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -5,10 +5,16 @@
#ifndef INTEL_SCALER_H
#define INTEL_SCALER_H
+#include <linux/types.h>
+
+enum drm_mode_status;
+struct drm_display_mode;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
+struct intel_display;
struct intel_dsb;
+enum intel_output_format;
struct intel_plane;
struct intel_plane_state;
@@ -32,4 +38,10 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
+bool skl_scaler_mode_valid(struct intel_display *display,
+ const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
+ int num_joined_pipes,
+ enum drm_mode_status *status);
+
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
2025-06-17 4:43 Suraj Kandpal
@ 2025-06-17 9:00 ` Jani Nikula
2025-06-17 9:32 ` Kandpal, Suraj
2025-06-20 6:46 ` Kandpal, Suraj
0 siblings, 2 replies; 14+ messages in thread
From: Jani Nikula @ 2025-06-17 9:00 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx
Cc: ankit.k.nautiyal, Suraj Kandpal, Jonathan Cavitt
On Tue, 17 Jun 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> We only support resolution up to 4k for single pipe when using
> YUV420 format so we prune these modes and restrict the plane size
> at src. This is because pipe scaling will not support YUV420 scaling
> for hwidth > 4096.
>
> --v2
> -Use output format to check [Ville]
> -Add Bspec references
> -Modify commit messge to point to why this is needed
>
> --v3
> -Use a function skl_scaler_mode_valid which is routed throug
> intel_pfit_mode_valid [Ville]
> -Combine the check conditons [Jonathan]
>
> Bspec: 49247, 50441
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> #v2
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++++---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +++
> drivers/gpu/drm/i915/display/intel_pfit.c | 12 ++++++++++++
> drivers/gpu/drm/i915/display/intel_pfit.h | 12 +++++++++++-
> drivers/gpu/drm/i915/display/skl_scaler.c | 18 ++++++++++++++++++
> drivers/gpu/drm/i915/display/skl_scaler.h | 12 ++++++++++++
> 6 files changed, 63 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 277b40b13948..7af936e6ea46 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1418,6 +1418,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> struct intel_display *display = to_intel_display(_connector->dev);
> struct intel_connector *connector = to_intel_connector(_connector);
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> + enum intel_output_format sink_format, output_format;
> const struct drm_display_mode *fixed_mode;
> int target_clock = mode->clock;
> int max_rate, mode_rate, max_lanes, max_link_clock;
> @@ -1451,6 +1452,12 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> mode->hdisplay, target_clock);
> max_dotclk *= num_joined_pipes;
>
> + sink_format = intel_dp_sink_format(connector, mode);
> + output_format = intel_dp_output_format(connector, sink_format);
> +
> + if (!intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes, &status))
> + return status;
I think all _mode_valid() functions should return enum drm_mode_status.
This now returns pretty much the same thing in two different ways, and
leaves status unset if it returns true. That's not a great interface.
> +
> if (target_clock > max_dotclk)
> return MODE_CLOCK_HIGH;
>
> @@ -1466,11 +1473,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> intel_dp_mode_min_output_bpp(connector, mode));
>
> if (intel_dp_has_dsc(connector)) {
> - enum intel_output_format sink_format, output_format;
> int pipe_bpp;
>
> - sink_format = intel_dp_sink_format(connector, mode);
> - output_format = intel_dp_output_format(connector, sink_format);
> /*
> * TBD pass the connector BPC,
> * for now U8_MAX so that max BPC on that platform would be picked
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 9961ff259298..53ba1e16100d 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2053,6 +2053,9 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
> else
> sink_format = INTEL_OUTPUT_FORMAT_RGB;
>
> + if (!intel_pfit_mode_valid(display, mode, sink_format, 0, &status))
> + return status;
> +
> status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
> if (status != MODE_OK) {
> if (ycbcr_420_only ||
> diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c b/drivers/gpu/drm/i915/display/intel_pfit.c
> index 13541be4d6df..a8fb92c3417a 100644
> --- a/drivers/gpu/drm/i915/display/intel_pfit.c
> +++ b/drivers/gpu/drm/i915/display/intel_pfit.c
> @@ -14,6 +14,7 @@
> #include "intel_lvds_regs.h"
> #include "intel_pfit.h"
> #include "intel_pfit_regs.h"
> +#include "skl_scaler.h"
>
> static int intel_pch_pfit_check_dst_window(const struct intel_crtc_state *crtc_state)
> {
> @@ -546,6 +547,17 @@ static int gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> return intel_gmch_pfit_check_timings(crtc_state);
> }
>
> +bool
> +intel_pfit_mode_valid(struct intel_display *display,
> + const struct drm_display_mode *mode,
> + enum intel_output_format output_format,
> + int num_joined_pipes,
> + enum drm_mode_status *status)
> +{
> + return skl_scaler_mode_valid(display, mode, output_format,
> + num_joined_pipes, status);
> +}
> +
Please explain why we're adding the extra dummy layer. Do we expect more
to be added here?
BR,
Jani.
> int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_pfit.h b/drivers/gpu/drm/i915/display/intel_pfit.h
> index ef34f9b49d09..ce68ceebc700 100644
> --- a/drivers/gpu/drm/i915/display/intel_pfit.h
> +++ b/drivers/gpu/drm/i915/display/intel_pfit.h
> @@ -6,8 +6,14 @@
> #ifndef __INTEL_PFIT_H__
> #define __INTEL_PFIT_H__
>
> +#include <linux/types.h>
> +
> +enum drm_mode_status;
> +struct drm_display_mode;
> struct drm_connector_state;
> struct intel_crtc_state;
> +struct intel_display;
> +enum intel_output_format;
>
> int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state);
> @@ -17,5 +23,9 @@ void ilk_pfit_get_config(struct intel_crtc_state *crtc_state);
> void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state);
> void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state);
> void i9xx_pfit_get_config(struct intel_crtc_state *crtc_state);
> -
> +bool intel_pfit_mode_valid(struct intel_display *display,
> + const struct drm_display_mode *mode,
> + enum intel_output_format output_format,
> + int num_joined_pipes,
> + enum drm_mode_status *status);
> #endif /* __INTEL_PFIT_H__ */
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index d77798499c57..27001b52daf8 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -134,6 +134,24 @@ static void skl_scaler_max_dst_size(struct intel_crtc *crtc,
> }
> }
>
> +bool
> +skl_scaler_mode_valid(struct intel_display *display,
> + const struct drm_display_mode *mode,
> + enum intel_output_format output_format,
> + int num_joined_pipes,
> + enum drm_mode_status *status)
> +{
> + if (num_joined_pipes < 2 && output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> + if (DISPLAY_VER(display) >= 14 &&
> + mode->hdisplay > 4096) {
> + *status = MODE_NO_420;
> + return false;
> + }
> + }
> +
> + return true;
> +}
> +
> static int
> skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
> unsigned int scaler_user, int *scaler_id,
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
> index 355ea15260ca..37c6543b4731 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> @@ -5,10 +5,16 @@
> #ifndef INTEL_SCALER_H
> #define INTEL_SCALER_H
>
> +#include <linux/types.h>
> +
> +enum drm_mode_status;
> +struct drm_display_mode;
> struct intel_atomic_state;
> struct intel_crtc;
> struct intel_crtc_state;
> +struct intel_display;
> struct intel_dsb;
> +enum intel_output_format;
> struct intel_plane;
> struct intel_plane_state;
>
> @@ -32,4 +38,10 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
>
> void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
>
> +bool skl_scaler_mode_valid(struct intel_display *display,
> + const struct drm_display_mode *mode,
> + enum intel_output_format output_format,
> + int num_joined_pipes,
> + enum drm_mode_status *status);
> +
> #endif
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
2025-06-17 9:00 ` Jani Nikula
@ 2025-06-17 9:32 ` Kandpal, Suraj
2025-06-20 6:46 ` Kandpal, Suraj
1 sibling, 0 replies; 14+ messages in thread
From: Kandpal, Suraj @ 2025-06-17 9:32 UTC (permalink / raw)
To: Jani Nikula, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Cavitt, Jonathan
> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Tuesday, June 17, 2025 2:30 PM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>; intel-xe@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Kandpal, Suraj
> <suraj.kandpal@intel.com>; Cavitt, Jonathan <jonathan.cavitt@intel.com>
> Subject: Re: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
>
> On Tue, 17 Jun 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> > We only support resolution up to 4k for single pipe when using
> > YUV420 format so we prune these modes and restrict the plane size at
> > src. This is because pipe scaling will not support YUV420 scaling for
> > hwidth > 4096.
> >
> > --v2
> > -Use output format to check [Ville]
> > -Add Bspec references
> > -Modify commit messge to point to why this is needed
> >
> > --v3
> > -Use a function skl_scaler_mode_valid which is routed throug
> > intel_pfit_mode_valid [Ville] -Combine the check conditons [Jonathan]
> >
> > Bspec: 49247, 50441
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> #v2
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++++---
> > drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +++
> > drivers/gpu/drm/i915/display/intel_pfit.c | 12 ++++++++++++
> > drivers/gpu/drm/i915/display/intel_pfit.h | 12 +++++++++++-
> > drivers/gpu/drm/i915/display/skl_scaler.c | 18 ++++++++++++++++++
> > drivers/gpu/drm/i915/display/skl_scaler.h | 12 ++++++++++++
> > 6 files changed, 63 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 277b40b13948..7af936e6ea46 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1418,6 +1418,7 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> > struct intel_display *display = to_intel_display(_connector->dev);
> > struct intel_connector *connector = to_intel_connector(_connector);
> > struct intel_dp *intel_dp = intel_attached_dp(connector);
> > + enum intel_output_format sink_format, output_format;
> > const struct drm_display_mode *fixed_mode;
> > int target_clock = mode->clock;
> > int max_rate, mode_rate, max_lanes, max_link_clock; @@ -1451,6
> > +1452,12 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> > mode->hdisplay,
> target_clock);
> > max_dotclk *= num_joined_pipes;
> >
> > + sink_format = intel_dp_sink_format(connector, mode);
> > + output_format = intel_dp_output_format(connector, sink_format);
> > +
> > + if (!intel_pfit_mode_valid(display, mode, output_format,
> num_joined_pipes, &status))
> > + return status;
>
> I think all _mode_valid() functions should return enum drm_mode_status.
>
> This now returns pretty much the same thing in two different ways, and
> leaves status unset if it returns true. That's not a great interface.
Sure will fix this
Regards,
Suraj Kandpal
>
> > +
> > if (target_clock > max_dotclk)
> > return MODE_CLOCK_HIGH;
> >
> > @@ -1466,11 +1473,8 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> >
> intel_dp_mode_min_output_bpp(connector, mode));
> >
> > if (intel_dp_has_dsc(connector)) {
> > - enum intel_output_format sink_format, output_format;
> > int pipe_bpp;
> >
> > - sink_format = intel_dp_sink_format(connector, mode);
> > - output_format = intel_dp_output_format(connector,
> sink_format);
> > /*
> > * TBD pass the connector BPC,
> > * for now U8_MAX so that max BPC on that platform would
> be picked
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > index 9961ff259298..53ba1e16100d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > @@ -2053,6 +2053,9 @@ intel_hdmi_mode_valid(struct drm_connector
> *_connector,
> > else
> > sink_format = INTEL_OUTPUT_FORMAT_RGB;
> >
> > + if (!intel_pfit_mode_valid(display, mode, sink_format, 0, &status))
> > + return status;
> > +
> > status = intel_hdmi_mode_clock_valid(&connector->base, clock,
> has_hdmi_sink, sink_format);
> > if (status != MODE_OK) {
> > if (ycbcr_420_only ||
> > diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c
> > b/drivers/gpu/drm/i915/display/intel_pfit.c
> > index 13541be4d6df..a8fb92c3417a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pfit.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pfit.c
> > @@ -14,6 +14,7 @@
> > #include "intel_lvds_regs.h"
> > #include "intel_pfit.h"
> > #include "intel_pfit_regs.h"
> > +#include "skl_scaler.h"
> >
> > static int intel_pch_pfit_check_dst_window(const struct
> > intel_crtc_state *crtc_state) { @@ -546,6 +547,17 @@ static int
> > gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> > return intel_gmch_pfit_check_timings(crtc_state);
> > }
> >
> > +bool
> > +intel_pfit_mode_valid(struct intel_display *display,
> > + const struct drm_display_mode *mode,
> > + enum intel_output_format output_format,
> > + int num_joined_pipes,
> > + enum drm_mode_status *status) {
> > + return skl_scaler_mode_valid(display, mode, output_format,
> > + num_joined_pipes, status);
> > +}
> > +
>
> Please explain why we're adding the extra dummy layer. Do we expect more
> to be added here?
>
> BR,
> Jani.
>
>
> > int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state *conn_state) {
> diff --git
> > a/drivers/gpu/drm/i915/display/intel_pfit.h
> > b/drivers/gpu/drm/i915/display/intel_pfit.h
> > index ef34f9b49d09..ce68ceebc700 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pfit.h
> > +++ b/drivers/gpu/drm/i915/display/intel_pfit.h
> > @@ -6,8 +6,14 @@
> > #ifndef __INTEL_PFIT_H__
> > #define __INTEL_PFIT_H__
> >
> > +#include <linux/types.h>
> > +
> > +enum drm_mode_status;
> > +struct drm_display_mode;
> > struct drm_connector_state;
> > struct intel_crtc_state;
> > +struct intel_display;
> > +enum intel_output_format;
> >
> > int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state *conn_state);
> @@ -17,5
> > +23,9 @@ void ilk_pfit_get_config(struct intel_crtc_state
> > *crtc_state); void i9xx_pfit_enable(const struct intel_crtc_state
> > *crtc_state); void i9xx_pfit_disable(const struct intel_crtc_state
> > *old_crtc_state); void i9xx_pfit_get_config(struct intel_crtc_state
> > *crtc_state);
> > -
> > +bool intel_pfit_mode_valid(struct intel_display *display,
> > + const struct drm_display_mode *mode,
> > + enum intel_output_format output_format,
> > + int num_joined_pipes,
> > + enum drm_mode_status *status);
> > #endif /* __INTEL_PFIT_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> > b/drivers/gpu/drm/i915/display/skl_scaler.c
> > index d77798499c57..27001b52daf8 100644
> > --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> > +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> > @@ -134,6 +134,24 @@ static void skl_scaler_max_dst_size(struct intel_crtc
> *crtc,
> > }
> > }
> >
> > +bool
> > +skl_scaler_mode_valid(struct intel_display *display,
> > + const struct drm_display_mode *mode,
> > + enum intel_output_format output_format,
> > + int num_joined_pipes,
> > + enum drm_mode_status *status) {
> > + if (num_joined_pipes < 2 && output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420) {
> > + if (DISPLAY_VER(display) >= 14 &&
> > + mode->hdisplay > 4096) {
> > + *status = MODE_NO_420;
> > + return false;
> > + }
> > + }
> > +
> > + return true;
> > +}
> > +
> > static int
> > skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
> > unsigned int scaler_user, int *scaler_id, diff --git
> > a/drivers/gpu/drm/i915/display/skl_scaler.h
> > b/drivers/gpu/drm/i915/display/skl_scaler.h
> > index 355ea15260ca..37c6543b4731 100644
> > --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> > +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> > @@ -5,10 +5,16 @@
> > #ifndef INTEL_SCALER_H
> > #define INTEL_SCALER_H
> >
> > +#include <linux/types.h>
> > +
> > +enum drm_mode_status;
> > +struct drm_display_mode;
> > struct intel_atomic_state;
> > struct intel_crtc;
> > struct intel_crtc_state;
> > +struct intel_display;
> > struct intel_dsb;
> > +enum intel_output_format;
> > struct intel_plane;
> > struct intel_plane_state;
> >
> > @@ -32,4 +38,10 @@ void skl_scaler_disable(const struct
> > intel_crtc_state *old_crtc_state);
> >
> > void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
> >
> > +bool skl_scaler_mode_valid(struct intel_display *display,
> > + const struct drm_display_mode *mode,
> > + enum intel_output_format output_format,
> > + int num_joined_pipes,
> > + enum drm_mode_status *status);
> > +
> > #endif
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
2025-06-17 9:00 ` Jani Nikula
2025-06-17 9:32 ` Kandpal, Suraj
@ 2025-06-20 6:46 ` Kandpal, Suraj
1 sibling, 0 replies; 14+ messages in thread
From: Kandpal, Suraj @ 2025-06-20 6:46 UTC (permalink / raw)
To: Jani Nikula, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Cavitt, Jonathan
> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Tuesday, June 17, 2025 2:30 PM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>; intel-xe@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Kandpal, Suraj
> <suraj.kandpal@intel.com>; Cavitt, Jonathan <jonathan.cavitt@intel.com>
> Subject: Re: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
>
> On Tue, 17 Jun 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> > We only support resolution up to 4k for single pipe when using
> > YUV420 format so we prune these modes and restrict the plane size at
> > src. This is because pipe scaling will not support YUV420 scaling for
> > hwidth > 4096.
> >
> > --v2
> > -Use output format to check [Ville]
> > -Add Bspec references
> > -Modify commit messge to point to why this is needed
> >
> > --v3
> > -Use a function skl_scaler_mode_valid which is routed throug
> > intel_pfit_mode_valid [Ville] -Combine the check conditons [Jonathan]
> >
> > Bspec: 49247, 50441
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> #v2
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++++---
> > drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +++
> > drivers/gpu/drm/i915/display/intel_pfit.c | 12 ++++++++++++
> > drivers/gpu/drm/i915/display/intel_pfit.h | 12 +++++++++++-
> > drivers/gpu/drm/i915/display/skl_scaler.c | 18 ++++++++++++++++++
> > drivers/gpu/drm/i915/display/skl_scaler.h | 12 ++++++++++++
> > 6 files changed, 63 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 277b40b13948..7af936e6ea46 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1418,6 +1418,7 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> > struct intel_display *display = to_intel_display(_connector->dev);
> > struct intel_connector *connector = to_intel_connector(_connector);
> > struct intel_dp *intel_dp = intel_attached_dp(connector);
> > + enum intel_output_format sink_format, output_format;
> > const struct drm_display_mode *fixed_mode;
> > int target_clock = mode->clock;
> > int max_rate, mode_rate, max_lanes, max_link_clock; @@ -1451,6
> > +1452,12 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> > mode->hdisplay,
> target_clock);
> > max_dotclk *= num_joined_pipes;
> >
> > + sink_format = intel_dp_sink_format(connector, mode);
> > + output_format = intel_dp_output_format(connector, sink_format);
> > +
> > + if (!intel_pfit_mode_valid(display, mode, output_format,
> num_joined_pipes, &status))
> > + return status;
>
> I think all _mode_valid() functions should return enum drm_mode_status.
>
> This now returns pretty much the same thing in two different ways, and
> leaves status unset if it returns true. That's not a great interface.
Sure will fix this
>
> > +
> > if (target_clock > max_dotclk)
> > return MODE_CLOCK_HIGH;
> >
> > @@ -1466,11 +1473,8 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> >
> intel_dp_mode_min_output_bpp(connector, mode));
> >
> > if (intel_dp_has_dsc(connector)) {
> > - enum intel_output_format sink_format, output_format;
> > int pipe_bpp;
> >
> > - sink_format = intel_dp_sink_format(connector, mode);
> > - output_format = intel_dp_output_format(connector,
> sink_format);
> > /*
> > * TBD pass the connector BPC,
> > * for now U8_MAX so that max BPC on that platform would
> be picked
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > index 9961ff259298..53ba1e16100d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > @@ -2053,6 +2053,9 @@ intel_hdmi_mode_valid(struct drm_connector
> *_connector,
> > else
> > sink_format = INTEL_OUTPUT_FORMAT_RGB;
> >
> > + if (!intel_pfit_mode_valid(display, mode, sink_format, 0, &status))
> > + return status;
> > +
> > status = intel_hdmi_mode_clock_valid(&connector->base, clock,
> has_hdmi_sink, sink_format);
> > if (status != MODE_OK) {
> > if (ycbcr_420_only ||
> > diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c
> > b/drivers/gpu/drm/i915/display/intel_pfit.c
> > index 13541be4d6df..a8fb92c3417a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pfit.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pfit.c
> > @@ -14,6 +14,7 @@
> > #include "intel_lvds_regs.h"
> > #include "intel_pfit.h"
> > #include "intel_pfit_regs.h"
> > +#include "skl_scaler.h"
> >
> > static int intel_pch_pfit_check_dst_window(const struct
> > intel_crtc_state *crtc_state) { @@ -546,6 +547,17 @@ static int
> > gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> > return intel_gmch_pfit_check_timings(crtc_state);
> > }
> >
> > +bool
> > +intel_pfit_mode_valid(struct intel_display *display,
> > + const struct drm_display_mode *mode,
> > + enum intel_output_format output_format,
> > + int num_joined_pipes,
> > + enum drm_mode_status *status) {
> > + return skl_scaler_mode_valid(display, mode, output_format,
> > + num_joined_pipes, status);
> > +}
> > +
>
> Please explain why we're adding the extra dummy layer. Do we expect more
> to be added here?
Its so that it has the same level of abstraction as intel_pfit_compute_config
As suggested by Ville
Check https://lore.kernel.org/all/aEchEa8p0bIKXMJa@intel.com/
Regards,
Suraj Kandpal
>
> BR,
> Jani.
>
>
> > int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state *conn_state) {
> diff --git
> > a/drivers/gpu/drm/i915/display/intel_pfit.h
> > b/drivers/gpu/drm/i915/display/intel_pfit.h
> > index ef34f9b49d09..ce68ceebc700 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pfit.h
> > +++ b/drivers/gpu/drm/i915/display/intel_pfit.h
> > @@ -6,8 +6,14 @@
> > #ifndef __INTEL_PFIT_H__
> > #define __INTEL_PFIT_H__
> >
> > +#include <linux/types.h>
> > +
> > +enum drm_mode_status;
> > +struct drm_display_mode;
> > struct drm_connector_state;
> > struct intel_crtc_state;
> > +struct intel_display;
> > +enum intel_output_format;
> >
> > int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state *conn_state);
> @@ -17,5
> > +23,9 @@ void ilk_pfit_get_config(struct intel_crtc_state
> > *crtc_state); void i9xx_pfit_enable(const struct intel_crtc_state
> > *crtc_state); void i9xx_pfit_disable(const struct intel_crtc_state
> > *old_crtc_state); void i9xx_pfit_get_config(struct intel_crtc_state
> > *crtc_state);
> > -
> > +bool intel_pfit_mode_valid(struct intel_display *display,
> > + const struct drm_display_mode *mode,
> > + enum intel_output_format output_format,
> > + int num_joined_pipes,
> > + enum drm_mode_status *status);
> > #endif /* __INTEL_PFIT_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> > b/drivers/gpu/drm/i915/display/skl_scaler.c
> > index d77798499c57..27001b52daf8 100644
> > --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> > +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> > @@ -134,6 +134,24 @@ static void skl_scaler_max_dst_size(struct intel_crtc
> *crtc,
> > }
> > }
> >
> > +bool
> > +skl_scaler_mode_valid(struct intel_display *display,
> > + const struct drm_display_mode *mode,
> > + enum intel_output_format output_format,
> > + int num_joined_pipes,
> > + enum drm_mode_status *status) {
> > + if (num_joined_pipes < 2 && output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420) {
> > + if (DISPLAY_VER(display) >= 14 &&
> > + mode->hdisplay > 4096) {
> > + *status = MODE_NO_420;
> > + return false;
> > + }
> > + }
> > +
> > + return true;
> > +}
> > +
> > static int
> > skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
> > unsigned int scaler_user, int *scaler_id, diff --git
> > a/drivers/gpu/drm/i915/display/skl_scaler.h
> > b/drivers/gpu/drm/i915/display/skl_scaler.h
> > index 355ea15260ca..37c6543b4731 100644
> > --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> > +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> > @@ -5,10 +5,16 @@
> > #ifndef INTEL_SCALER_H
> > #define INTEL_SCALER_H
> >
> > +#include <linux/types.h>
> > +
> > +enum drm_mode_status;
> > +struct drm_display_mode;
> > struct intel_atomic_state;
> > struct intel_crtc;
> > struct intel_crtc_state;
> > +struct intel_display;
> > struct intel_dsb;
> > +enum intel_output_format;
> > struct intel_plane;
> > struct intel_plane_state;
> >
> > @@ -32,4 +38,10 @@ void skl_scaler_disable(const struct
> > intel_crtc_state *old_crtc_state);
> >
> > void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
> >
> > +bool skl_scaler_mode_valid(struct intel_display *display,
> > + const struct drm_display_mode *mode,
> > + enum intel_output_format output_format,
> > + int num_joined_pipes,
> > + enum drm_mode_status *status);
> > +
> > #endif
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
@ 2025-06-20 9:25 Suraj Kandpal
2025-07-07 4:30 ` Nautiyal, Ankit K
0 siblings, 1 reply; 14+ messages in thread
From: Suraj Kandpal @ 2025-06-20 9:25 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, jani.nikula, Suraj Kandpal, Jonathan Cavitt
We only support resolution up to 4k for single pipe when using
YUV420 format so we prune these modes and restrict the plane size
at src. This is because pipe scaling will not support YUV420 scaling
for hwidth > 4096.
--v2
-Use output format to check [Ville]
-Add Bspec references
-Modify commit messge to point to why this is needed
--v3
-Use a function skl_scaler_mode_valid which is routed throug
intel_pfit_mode_valid [Ville]
-Combine the check conditons [Jonathan]
--v4
-mode_valid functions should return drm_mode_status [Jani]
Bspec: 49247, 50441
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> #v2
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 ++++++++---
drivers/gpu/drm/i915/display/intel_hdmi.c | 4 ++++
drivers/gpu/drm/i915/display/intel_pfit.c | 11 +++++++++++
drivers/gpu/drm/i915/display/intel_pfit.h | 12 +++++++++++-
drivers/gpu/drm/i915/display/skl_scaler.c | 16 ++++++++++++++++
drivers/gpu/drm/i915/display/skl_scaler.h | 12 ++++++++++++
6 files changed, 62 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 277b40b13948..f10650d79663 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1418,6 +1418,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
struct intel_display *display = to_intel_display(_connector->dev);
struct intel_connector *connector = to_intel_connector(_connector);
struct intel_dp *intel_dp = intel_attached_dp(connector);
+ enum intel_output_format sink_format, output_format;
const struct drm_display_mode *fixed_mode;
int target_clock = mode->clock;
int max_rate, mode_rate, max_lanes, max_link_clock;
@@ -1451,6 +1452,13 @@ intel_dp_mode_valid(struct drm_connector *_connector,
mode->hdisplay, target_clock);
max_dotclk *= num_joined_pipes;
+ sink_format = intel_dp_sink_format(connector, mode);
+ output_format = intel_dp_output_format(connector, sink_format);
+
+ status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
+ if (status != MODE_OK)
+ return status;
+
if (target_clock > max_dotclk)
return MODE_CLOCK_HIGH;
@@ -1466,11 +1474,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
intel_dp_mode_min_output_bpp(connector, mode));
if (intel_dp_has_dsc(connector)) {
- enum intel_output_format sink_format, output_format;
int pipe_bpp;
- sink_format = intel_dp_sink_format(connector, mode);
- output_format = intel_dp_output_format(connector, sink_format);
/*
* TBD pass the connector BPC,
* for now U8_MAX so that max BPC on that platform would be picked
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 9961ff259298..03045d188817 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2053,6 +2053,10 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
else
sink_format = INTEL_OUTPUT_FORMAT_RGB;
+ status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+ if (status != MODE_OK)
+ return status;
+
status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
if (status != MODE_OK) {
if (ycbcr_420_only ||
diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c b/drivers/gpu/drm/i915/display/intel_pfit.c
index 13541be4d6df..68539e7c2a24 100644
--- a/drivers/gpu/drm/i915/display/intel_pfit.c
+++ b/drivers/gpu/drm/i915/display/intel_pfit.c
@@ -14,6 +14,7 @@
#include "intel_lvds_regs.h"
#include "intel_pfit.h"
#include "intel_pfit_regs.h"
+#include "skl_scaler.h"
static int intel_pch_pfit_check_dst_window(const struct intel_crtc_state *crtc_state)
{
@@ -546,6 +547,16 @@ static int gmch_panel_fitting(struct intel_crtc_state *crtc_state,
return intel_gmch_pfit_check_timings(crtc_state);
}
+enum drm_mode_status
+intel_pfit_mode_valid(struct intel_display *display,
+ const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
+ int num_joined_pipes)
+{
+ return skl_scaler_mode_valid(display, mode, output_format,
+ num_joined_pipes);
+}
+
int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_pfit.h b/drivers/gpu/drm/i915/display/intel_pfit.h
index ef34f9b49d09..2f075748a34e 100644
--- a/drivers/gpu/drm/i915/display/intel_pfit.h
+++ b/drivers/gpu/drm/i915/display/intel_pfit.h
@@ -6,8 +6,14 @@
#ifndef __INTEL_PFIT_H__
#define __INTEL_PFIT_H__
+#include <linux/types.h>
+
+enum drm_mode_status;
+struct drm_display_mode;
struct drm_connector_state;
struct intel_crtc_state;
+struct intel_display;
+enum intel_output_format;
int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
@@ -17,5 +23,9 @@ void ilk_pfit_get_config(struct intel_crtc_state *crtc_state);
void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state);
void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state);
void i9xx_pfit_get_config(struct intel_crtc_state *crtc_state);
-
+enum drm_mode_status
+intel_pfit_mode_valid(struct intel_display *display,
+ const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
+ int num_joined_pipes);
#endif /* __INTEL_PFIT_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index d77798499c57..b8193ebf0772 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -134,6 +134,22 @@ static void skl_scaler_max_dst_size(struct intel_crtc *crtc,
}
}
+enum drm_mode_status
+skl_scaler_mode_valid(struct intel_display *display,
+ const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
+ int num_joined_pipes)
+{
+ if (num_joined_pipes < 2 && output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+ if (DISPLAY_VER(display) >= 14 &&
+ mode->hdisplay > 4096) {
+ return MODE_NO_420;
+ }
+ }
+
+ return MODE_OK;
+}
+
static int
skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
unsigned int scaler_user, int *scaler_id,
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index 355ea15260ca..7beee5ee0e89 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -5,10 +5,16 @@
#ifndef INTEL_SCALER_H
#define INTEL_SCALER_H
+#include <linux/types.h>
+
+enum drm_mode_status;
+struct drm_display_mode;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
+struct intel_display;
struct intel_dsb;
+enum intel_output_format;
struct intel_plane;
struct intel_plane_state;
@@ -32,4 +38,10 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
+enum drm_mode_status
+skl_scaler_mode_valid(struct intel_display *display,
+ const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
+ int num_joined_pipes);
+
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
2025-06-20 9:25 Suraj Kandpal
@ 2025-07-07 4:30 ` Nautiyal, Ankit K
0 siblings, 0 replies; 14+ messages in thread
From: Nautiyal, Ankit K @ 2025-07-07 4:30 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx; +Cc: jani.nikula, Jonathan Cavitt
On 6/20/2025 2:55 PM, Suraj Kandpal wrote:
> We only support resolution up to 4k for single pipe when using
> YUV420 format so we prune these modes and restrict the plane size
> at src. This is because pipe scaling will not support YUV420 scaling
> for hwidth > 4096.
>
> --v2
> -Use output format to check [Ville]
> -Add Bspec references
> -Modify commit messge to point to why this is needed
>
> --v3
> -Use a function skl_scaler_mode_valid which is routed throug
> intel_pfit_mode_valid [Ville]
> -Combine the check conditons [Jonathan]
>
> --v4
> -mode_valid functions should return drm_mode_status [Jani]
>
> Bspec: 49247, 50441
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> #v2
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 11 ++++++++---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_pfit.c | 11 +++++++++++
> drivers/gpu/drm/i915/display/intel_pfit.h | 12 +++++++++++-
> drivers/gpu/drm/i915/display/skl_scaler.c | 16 ++++++++++++++++
> drivers/gpu/drm/i915/display/skl_scaler.h | 12 ++++++++++++
> 6 files changed, 62 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 277b40b13948..f10650d79663 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1418,6 +1418,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> struct intel_display *display = to_intel_display(_connector->dev);
> struct intel_connector *connector = to_intel_connector(_connector);
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> + enum intel_output_format sink_format, output_format;
> const struct drm_display_mode *fixed_mode;
> int target_clock = mode->clock;
> int max_rate, mode_rate, max_lanes, max_link_clock;
> @@ -1451,6 +1452,13 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> mode->hdisplay, target_clock);
> max_dotclk *= num_joined_pipes;
>
> + sink_format = intel_dp_sink_format(connector, mode);
> + output_format = intel_dp_output_format(connector, sink_format);
> +
> + status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
> + if (status != MODE_OK)
> + return status;
> +
> if (target_clock > max_dotclk)
> return MODE_CLOCK_HIGH;
>
> @@ -1466,11 +1474,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> intel_dp_mode_min_output_bpp(connector, mode));
>
> if (intel_dp_has_dsc(connector)) {
> - enum intel_output_format sink_format, output_format;
> int pipe_bpp;
>
> - sink_format = intel_dp_sink_format(connector, mode);
> - output_format = intel_dp_output_format(connector, sink_format);
> /*
> * TBD pass the connector BPC,
> * for now U8_MAX so that max BPC on that platform would be picked
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 9961ff259298..03045d188817 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2053,6 +2053,10 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
> else
> sink_format = INTEL_OUTPUT_FORMAT_RGB;
>
> + status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> + if (status != MODE_OK)
> + return status;
> +
> status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
> if (status != MODE_OK) {
> if (ycbcr_420_only ||
> diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c b/drivers/gpu/drm/i915/display/intel_pfit.c
> index 13541be4d6df..68539e7c2a24 100644
> --- a/drivers/gpu/drm/i915/display/intel_pfit.c
> +++ b/drivers/gpu/drm/i915/display/intel_pfit.c
> @@ -14,6 +14,7 @@
> #include "intel_lvds_regs.h"
> #include "intel_pfit.h"
> #include "intel_pfit_regs.h"
> +#include "skl_scaler.h"
>
> static int intel_pch_pfit_check_dst_window(const struct intel_crtc_state *crtc_state)
> {
> @@ -546,6 +547,16 @@ static int gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> return intel_gmch_pfit_check_timings(crtc_state);
> }
>
> +enum drm_mode_status
> +intel_pfit_mode_valid(struct intel_display *display,
> + const struct drm_display_mode *mode,
> + enum intel_output_format output_format,
> + int num_joined_pipes)
> +{
> + return skl_scaler_mode_valid(display, mode, output_format,
> + num_joined_pipes);
> +}
> +
> int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_pfit.h b/drivers/gpu/drm/i915/display/intel_pfit.h
> index ef34f9b49d09..2f075748a34e 100644
> --- a/drivers/gpu/drm/i915/display/intel_pfit.h
> +++ b/drivers/gpu/drm/i915/display/intel_pfit.h
> @@ -6,8 +6,14 @@
> #ifndef __INTEL_PFIT_H__
> #define __INTEL_PFIT_H__
>
> +#include <linux/types.h>
> +
> +enum drm_mode_status;
> +struct drm_display_mode;
> struct drm_connector_state;
> struct intel_crtc_state;
> +struct intel_display;
> +enum intel_output_format;
>
> int intel_pfit_compute_config(struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state);
> @@ -17,5 +23,9 @@ void ilk_pfit_get_config(struct intel_crtc_state *crtc_state);
> void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state);
> void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state);
> void i9xx_pfit_get_config(struct intel_crtc_state *crtc_state);
> -
> +enum drm_mode_status
> +intel_pfit_mode_valid(struct intel_display *display,
> + const struct drm_display_mode *mode,
> + enum intel_output_format output_format,
> + int num_joined_pipes);
> #endif /* __INTEL_PFIT_H__ */
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index d77798499c57..b8193ebf0772 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -134,6 +134,22 @@ static void skl_scaler_max_dst_size(struct intel_crtc *crtc,
> }
> }
>
> +enum drm_mode_status
> +skl_scaler_mode_valid(struct intel_display *display,
> + const struct drm_display_mode *mode,
> + enum intel_output_format output_format,
> + int num_joined_pipes)
> +{
> + if (num_joined_pipes < 2 && output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> + if (DISPLAY_VER(display) >= 14 &&
> + mode->hdisplay > 4096) {
Lets use skl_scaler_max_src_size to get the the max src width, that the
scaler supports for a given platform.
Compare max_w with mode->hdisplay.
Regards,
Ankit
> + return MODE_NO_420;
> + }
> + }
> +
> + return MODE_OK;
> +}
> +
> static int
> skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
> unsigned int scaler_user, int *scaler_id,
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
> index 355ea15260ca..7beee5ee0e89 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> @@ -5,10 +5,16 @@
> #ifndef INTEL_SCALER_H
> #define INTEL_SCALER_H
>
> +#include <linux/types.h>
> +
> +enum drm_mode_status;
> +struct drm_display_mode;
> struct intel_atomic_state;
> struct intel_crtc;
> struct intel_crtc_state;
> +struct intel_display;
> struct intel_dsb;
> +enum intel_output_format;
> struct intel_plane;
> struct intel_plane_state;
>
> @@ -32,4 +38,10 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
>
> void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
>
> +enum drm_mode_status
> +skl_scaler_mode_valid(struct intel_display *display,
> + const struct drm_display_mode *mode,
> + enum intel_output_format output_format,
> + int num_joined_pipes);
> +
> #endif
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2025-07-07 4:30 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
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2025-03-04 20:00 [PATCH] drm/i915/xe3lpd: Prune modes for YUV420 Matt Atwood
2025-03-04 22:08 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2025-03-04 22:26 ` ✗ i915.CI.BAT: failure " Patchwork
2025-03-05 13:32 ` [PATCH] " Ville Syrjälä
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2025-06-09 16:45 Suraj Kandpal
2025-06-09 17:20 ` Cavitt, Jonathan
2025-06-09 17:59 ` Ville Syrjälä
2025-06-11 1:10 ` Kandpal, Suraj
2025-06-17 4:43 Suraj Kandpal
2025-06-17 9:00 ` Jani Nikula
2025-06-17 9:32 ` Kandpal, Suraj
2025-06-20 6:46 ` Kandpal, Suraj
2025-06-20 9:25 Suraj Kandpal
2025-07-07 4:30 ` Nautiyal, Ankit K
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