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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <03dfb2ad-50de-406d-bdd0-41352c21f82b@suse.com> On Wed, Mar 05, 2025 at 03:54:56PM +0100, Jan Beulich wrote: > On 05.03.2025 15:35, Roger Pau Monné wrote: > > On Wed, Mar 05, 2025 at 03:27:18PM +0100, Jan Beulich wrote: > >> On 19.02.2025 17:48, Roger Pau Monne wrote: > >>> Hello, > >>> > >>> First two patches are preparatory changes to reduce the changes required > >>> in patch 3. I would have wanted those to go in 4.20 to fix the issues > >>> on Lenovo Thinkpads, but it's too late now. > >>> > >>> Thanks, Roger. > >>> > >>> Roger Pau Monne (3): > >>> x86/dom0: correctly set the maximum ->iomem_caps bound for PVH > >>> x86/iommu: account for IOMEM caps when populating dom0 IOMMU > >>> page-tables > >>> x86/dom0: be less restrictive with the Interrupt Address Range > >> > >> I'm uncertain whether to take this and "x86/pvh: workaround missing MMIO > >> regions in dom0 p2m" for backport. The sole Fixes: tag is in patch 1 here. > >> Thoughts? > > > > At least the ones here would be helpful for the reported Lenovo > > Thinkpad issue. The PVH p2m addition would be nice IMO. > > Are the ones here sufficient to deal with that issue? IOW iasn't the other > 2-patch series also necessary? For a PV dom0, yes, the patches here are enough. For a PVH dom0 you also need "x86/pvh: workaround missing MMIO regions in dom0 p2m". Given that we now officially support PVH I think we would need to backport the latter, to have parity between PV and PVH dom0. Thanks, Roger.