From: Leo Liang <ycliang@andestech.com>
To: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Cc: Bin Meng <bmeng.cn@gmail.com>, Rick Chen <rick@andestech.com>,
<u-boot@lists.denx.de>
Subject: Re: [PATCH 1/1] riscv: qemu: imply CONFIG_RNG_RISCV_ZKR
Date: Thu, 6 Mar 2025 11:14:50 +0800 [thread overview]
Message-ID: <Z8kTKu8ltELE9qaG@swlinux02> (raw)
In-Reply-To: <20250302085017.22046-1-heinrich.schuchardt@canonical.com>
On Sun, Mar 02, 2025 at 09:50:17AM +0100, Heinrich Schuchardt wrote:
> The zkr ISA extension can be used to generate random numbers. Since RVA22
> zkr is an optional ISA extension. It can be emulated by QEMU. Our RNG
> driver detects if the extension is usable during driver binding. Let's
> enable it by default on QEMU.
>
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---
> board/emulation/qemu-riscv/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
prev parent reply other threads:[~2025-03-06 3:15 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-02 8:50 [PATCH 1/1] riscv: qemu: imply CONFIG_RNG_RISCV_ZKR Heinrich Schuchardt
2025-03-06 3:14 ` Leo Liang [this message]
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