From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Shekhar Chauhan <shekhar.chauhan@intel.com>
Cc: igt-dev@lists.freedesktop.org, juha-pekka.heikkila@intel.com
Subject: Re: [PATCH v2] tests/kms_cursor_crc.: Test async cursor crc
Date: Wed, 12 Mar 2025 13:28:51 +0200 [thread overview]
Message-ID: <Z9Fv8w9qmnBS4i7a@intel.com> (raw)
In-Reply-To: <20250311043002.127979-1-shekhar.chauhan@intel.com>
On Tue, Mar 11, 2025 at 10:00:02AM +0530, Shekhar Chauhan wrote:
> + /* get the screen refresh rate, then wait for vblank, and
> + * wait for 1/5 of time of screen refresh and change image.
> + * change it mid screen to validate that the change happens
> + * at the end of the current frame.
The legacy cursor uapi doesn't specify whether the cursor updates
are synchronized to vblank or not. So this is testing for
hardware/driver specific behaviour.
> + */
> + usleep(1.0f / data->refresh / 5.0f * 1e6);
> +
> + changefunc(data, SECONDIMAGE);
> + igt_display_commit(&data->display);
> + igt_pipe_crc_get_current(data->drm_fd, data->pipe_crc, &crc2);
> +
> + igt_assert_crc_equal(&crc1, &crc2);
> +
> + igt_pipe_crc_get_current(data->drm_fd, data->pipe_crc, &crc2);
> +
> + /* check next frame will be different as expected*/
> + igt_assert_f(igt_find_crc_mismatch(&crc1, &crc2, NULL),
> + "crc values were not supposing to match!\n");
This could fail due to a false positive. If you really want to test
for CRC inequality I think you'd first have to make sure such an
inequality actually exists.
--
Ville Syrjälä
Intel
prev parent reply other threads:[~2025-03-12 11:28 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-11 4:30 [PATCH v2] tests/kms_cursor_crc.: Test async cursor crc Shekhar Chauhan
2025-03-11 5:23 ` ✓ Xe.CI.BAT: success for tests/kms_cursor_crc.: Test async cursor crc (rev2) Patchwork
2025-03-11 5:34 ` ✓ i915.CI.BAT: " Patchwork
2025-03-11 7:22 ` ✗ i915.CI.Full: failure " Patchwork
2025-03-12 11:10 ` Chauhan, Shekhar
2025-03-12 0:03 ` ✗ Xe.CI.Full: " Patchwork
2025-03-12 11:10 ` Chauhan, Shekhar
2025-03-12 11:28 ` Ville Syrjälä [this message]
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