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DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?iso-8859-1?Q?s0RuKIfgOrWqUz/KWdOQ22mx8fnpGv0/9uF0HqmufPnmJTnUgMvw4xYaBS?= =?iso-8859-1?Q?+vs4O100tEXfyUCTVfVrgFqnriV4HXeOl1aFyJguPCrTNJkwW4U0JX5pKM?= =?iso-8859-1?Q?rER3sv+qZUdvhjOhpH1mSjnZqX8uTAErJu4DoMAHqh+n3nUjcMlCLqfeLc?= =?iso-8859-1?Q?DEd/nPn1l+2Qs4TYn+O80SBJrV+UIe2MxXDw6qGg/YcyTy1JIrjH59q9xB?= =?iso-8859-1?Q?zi/7/dAnWVOU1GjuDO+VDifdPHhaWWpa299/sxzyZz85mK0jXIyStGLEpl?= =?iso-8859-1?Q?wVpQihEArYLYS0j8NSBYybC2ERwLHRL/8WvbuoiC5TW9Q/jqJPXv20l/DX?= =?iso-8859-1?Q?8FenfOTcFH5r/7j7ictu6ADxEGAwtoMe86a0ZowAX8t13SkR0kaJAggi/y?= =?iso-8859-1?Q?xWm4m9xKS00s69gzZDywk+Y1M9LqJJc1kyu20HwxzkBnwDD+lH4sxLI4MD?= =?iso-8859-1?Q?v5NM+kqWBsh+RHMMoBKmxbAmMwpyYkFIEQzhL5JvRQpdK6v4L2qSTxfncG?= =?iso-8859-1?Q?qWWERrODY7t8R/NGPqzc2/hg+nE+kxwhDa56Pf2mVmiqKWGSIkr5/1P2Td?= =?iso-8859-1?Q?FM7b/MwKts9o26vHcG7UDHdiZazu9yv7gw78VeuITGXezyIzvCds6mi6CE?= =?iso-8859-1?Q?VJFer83TxYi5d8PZv6TjjA6K9vjd8KmQ9DOjEf0xHPQ9OQRbPdNTYBLyT7?= =?iso-8859-1?Q?o4YU3Mpx1+Y/uk+gD5GV/cZXqtcf9B2nl/Lr+s/plaHME7zucyUfaUXLYk?= =?iso-8859-1?Q?+tl0lXv6cCCVAF7SOqwGqZE4uflgcVyPFTOcDHBXIszJy+Y4P12vp7xiz1?= =?iso-8859-1?Q?+8sl81ZSbWVP7DNHIGbRZRmWVsIJpPKWu88mLo6+vRWkX2DX7N9A67//HX?= =?iso-8859-1?Q?NvETEPjtc07DPEcHsSAw669ZlZUAFc/rnl8gyTBpGLwznmPmCjVun1SyG2?= =?iso-8859-1?Q?jY59kylyLZzEL9W4Xx1LqeQfem8VQT5/Hit75n9b7p6lxDBNCwyL9U3EYa?= =?iso-8859-1?Q?M6BABOKaJfji2RANOf2y83fsCLJB/nG1JsEOSyRR89XZTNX1C+YlzNkR66?= =?iso-8859-1?Q?99gex36zyxnctMESkEM8d5yApIpcjdJ16VviTH5J395gzBStDn1n4KROIw?= =?iso-8859-1?Q?1/XdcrhYp3A1qGyA6aymieLxfxOJHYnCbGauBCI32Xepp5a2adnv5SEZT5?= =?iso-8859-1?Q?M0nRViVbOxQD8hJNB2KAwWuDDI3RIsN4jPKuz0CgqNf/xaGD/PEbEkIFKN?= =?iso-8859-1?Q?mNN0yJq/9k2SEm/ilSecm2crkQ+GDpFh/ifm7TFdDYkZjwPee326NP2pQJ?= =?iso-8859-1?Q?4aPv9v9GJ9381lUhV07ZG/MKC6IuEKMfNb4xhsoGSb0TMz1nQsJiwNc7XL?= =?iso-8859-1?Q?SqFOyCpdAvh3jv05kqYoxLfOfE0TMnbfzrydaGPkZ0ZXspPeoSyk0zsNH2?= =?iso-8859-1?Q?zezzB8K2xLsSNstSyPg1mmDD9hvJwd6aeQSwRhdFv3yl5/+XrHyVSHQ2ep?= =?iso-8859-1?Q?18UnOi/xrwoHon8mQQIQLH82rZiQQdxZ+KbDKFlfRwcTKvXJDdptCQqWNu?= =?iso-8859-1?Q?fN1xFiD5zEwzhPGnjH3V+UJ/Wq9jVmRgiXd7XtZGcLxIwueLl2E5VrVx/g?= =?iso-8859-1?Q?CRVQnp42aJ47Q4qMe0E2I9AwWNEODq2qCj+4p/DPmJYd61bRhPRjZ3xA?= =?iso-8859-1?Q?=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: f9410e3f-1284-40a2-c988-08db1b4d7f36 X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6059.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 18:39:46.6754 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: CJahu+UMBidNG6DWi7VYI102MJ0QJICkNHny2JCpRDRrq2vBKPfmo/tCwdtA/6yeAGKqgqRJE9e3dJxRCDZ0Zw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR11MB6339 X-OriginatorOrg: intel.com Subject: Re: [Intel-gfx] [PATCH 5/6] drm/i915: rename intel_pm.[ch] to intel_clock_gating.[ch] X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Mar 01, 2023 at 03:54:19PM +0200, Jani Nikula wrote: > Observe that intel_pm.[ch] is now purely about clock gating, so rename > them to intel_clock_gating.[ch]. Rename the functions to > intel_clock_gating_*() to follow coding conventions. > > Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/Makefile | 2 +- > drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- > drivers/gpu/drm/i915/i915_driver.c | 8 ++++---- > drivers/gpu/drm/i915/i915_gem.c | 8 ++++---- > .../i915/{intel_pm.c => intel_clock_gating.c} | 8 ++++---- > drivers/gpu/drm/i915/intel_clock_gating.h | 14 ++++++++++++++ > drivers/gpu/drm/i915/intel_pm.h | 18 ------------------ > drivers/gpu/drm/i915/vlv_suspend.c | 4 ++-- > 8 files changed, 31 insertions(+), 35 deletions(-) > rename drivers/gpu/drm/i915/{intel_pm.c => intel_clock_gating.c} (99%) > create mode 100644 drivers/gpu/drm/i915/intel_clock_gating.h > delete mode 100644 drivers/gpu/drm/i915/intel_pm.h > > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile > index b2f91a1f8268..b88df8c10781 100644 > --- a/drivers/gpu/drm/i915/Makefile > +++ b/drivers/gpu/drm/i915/Makefile > @@ -47,10 +47,10 @@ i915-y += i915_driver.o \ > i915_switcheroo.o \ > i915_sysfs.o \ > i915_utils.o \ > + intel_clock_gating.o \ > intel_device_info.o \ > intel_memory_region.o \ > intel_pcode.o \ > - intel_pm.o \ > intel_region_ttm.o \ > intel_runtime_pm.o \ > intel_sbi.o \ > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index a1fbdf32bd21..3f1b90a2f57c 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -63,6 +63,7 @@ > #include "intel_audio.h" > #include "intel_bw.h" > #include "intel_cdclk.h" > +#include "intel_clock_gating.h" > #include "intel_color.h" > #include "intel_crt.h" > #include "intel_crtc.h" > @@ -105,7 +106,6 @@ > #include "intel_pcode.h" > #include "intel_pipe_crc.h" > #include "intel_plane_initial.h" > -#include "intel_pm.h" > #include "intel_pps.h" > #include "intel_psr.h" > #include "intel_quirks.h" > @@ -850,7 +850,7 @@ void intel_display_finish_reset(struct drm_i915_private *i915) > */ > intel_pps_unlock_regs_wa(i915); > intel_modeset_init_hw(i915); > - intel_init_clock_gating(i915); > + intel_clock_gating_init(i915); > intel_hpd_init(i915); > > ret = __intel_display_resume(i915, state, ctx); > diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c > index a53fd339e2cc..e4809485e47c 100644 > --- a/drivers/gpu/drm/i915/i915_driver.c > +++ b/drivers/gpu/drm/i915/i915_driver.c > @@ -79,11 +79,11 @@ > #include "soc/intel_dram.h" > #include "soc/intel_gmch.h" > > -#include "i915_file_private.h" > #include "i915_debugfs.h" > #include "i915_driver.h" > #include "i915_drm_client.h" > #include "i915_drv.h" > +#include "i915_file_private.h" > #include "i915_getparam.h" > #include "i915_hwmon.h" > #include "i915_ioc32.h" > @@ -97,11 +97,11 @@ > #include "i915_sysfs.h" > #include "i915_utils.h" > #include "i915_vgpu.h" > +#include "intel_clock_gating.h" > #include "intel_gvt.h" > #include "intel_memory_region.h" > #include "intel_pci_config.h" > #include "intel_pcode.h" > -#include "intel_pm.h" > #include "intel_region_ttm.h" > #include "vlv_suspend.h" > > @@ -252,7 +252,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv) > > intel_irq_init(dev_priv); > intel_init_display_hooks(dev_priv); > - intel_init_clock_gating_hooks(dev_priv); > + intel_clock_gating_hooks_init(dev_priv); > > intel_detect_preproduction_hw(dev_priv); > > @@ -1238,7 +1238,7 @@ static int i915_drm_resume(struct drm_device *dev) > i915_gem_resume(dev_priv); > > intel_modeset_init_hw(dev_priv); > - intel_init_clock_gating(dev_priv); > + intel_clock_gating_init(dev_priv); > intel_hpd_init(dev_priv); > > /* MST sideband requires HPD interrupts enabled */ > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 35950fa91406..6b6b0e575ef3 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -58,7 +58,7 @@ > #include "i915_file_private.h" > #include "i915_trace.h" > #include "i915_vgpu.h" > -#include "intel_pm.h" > +#include "intel_clock_gating.h" > > static int > insert_mappable_node(struct i915_ggtt *ggtt, struct drm_mm_node *node, u32 size) > @@ -1164,7 +1164,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) > } > > /* > - * Despite its name intel_init_clock_gating applies both display > + * Despite its name intel_clock_gating_init applies both display > * clock gating workarounds; GT mmio workarounds and the occasional > * GT power context workaround. Worse, sometimes it includes a context > * register workaround which we need to apply before we record the > @@ -1172,7 +1172,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) > * > * FIXME: break up the workarounds and apply them at the right time! > */ > - intel_init_clock_gating(dev_priv); > + intel_clock_gating_init(dev_priv); > > for_each_gt(gt, dev_priv, i) { > ret = intel_gt_init(gt); > @@ -1216,7 +1216,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) > /* Minimal basic recovery for KMS */ > ret = i915_ggtt_enable_hw(dev_priv); > i915_ggtt_resume(to_gt(dev_priv)->ggtt); > - intel_init_clock_gating(dev_priv); > + intel_clock_gating_init(dev_priv); > } > > i915_gem_drain_freed_objects(dev_priv); > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_clock_gating.c > similarity index 99% > rename from drivers/gpu/drm/i915/intel_pm.c > rename to drivers/gpu/drm/i915/intel_clock_gating.c > index c45af0d981fd..8cfc19b48760 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_clock_gating.c > @@ -36,8 +36,8 @@ > #include "gt/intel_gt_regs.h" > > #include "i915_drv.h" > +#include "intel_clock_gating.h" > #include "intel_mchbar_regs.h" > -#include "intel_pm.h" > #include "vlv_sideband.h" > > struct drm_i915_clock_gating_funcs { > @@ -774,7 +774,7 @@ static void i830_init_clock_gating(struct drm_i915_private *dev_priv) > _MASKED_BIT_ENABLE(MEM_DISPLAY_B_TRICKLE_FEED_DISABLE)); > } > > -void intel_init_clock_gating(struct drm_i915_private *dev_priv) > +void intel_clock_gating_init(struct drm_i915_private *dev_priv) > { > dev_priv->clock_gating_funcs->init_clock_gating(dev_priv); > } > @@ -818,7 +818,7 @@ CG_FUNCS(nop); > #undef CG_FUNCS > > /** > - * intel_init_clock_gating_hooks - setup the clock gating hooks > + * intel_clock_gating_hooks_init - setup the clock gating hooks > * @dev_priv: device private > * > * Setup the hooks that configure which clocks of a given platform can be > @@ -826,7 +826,7 @@ CG_FUNCS(nop); > * platforms. Note that some GT specific workarounds are applied separately > * when GPU contexts or batchbuffers start their execution. > */ > -void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv) > +void intel_clock_gating_hooks_init(struct drm_i915_private *dev_priv) > { > if (IS_METEORLAKE(dev_priv)) > dev_priv->clock_gating_funcs = &nop_clock_gating_funcs; > diff --git a/drivers/gpu/drm/i915/intel_clock_gating.h b/drivers/gpu/drm/i915/intel_clock_gating.h > new file mode 100644 > index 000000000000..5b4e4c55b2c2 > --- /dev/null > +++ b/drivers/gpu/drm/i915/intel_clock_gating.h > @@ -0,0 +1,14 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2019 Intel Corporation > + */ > + > +#ifndef __INTEL_CLOCK_GATING_H__ > +#define __INTEL_CLOCK_GATING_H__ > + > +struct drm_i915_private; > + > +void intel_clock_gating_init(struct drm_i915_private *i915); > +void intel_clock_gating_hooks_init(struct drm_i915_private *i915); > + > +#endif /* __INTEL_CLOCK_GATING_H__ */ > diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h > deleted file mode 100644 > index f774bddcdca6..000000000000 > --- a/drivers/gpu/drm/i915/intel_pm.h > +++ /dev/null > @@ -1,18 +0,0 @@ > -/* SPDX-License-Identifier: MIT */ > -/* > - * Copyright © 2019 Intel Corporation > - */ > - > -#ifndef __INTEL_PM_H__ > -#define __INTEL_PM_H__ > - > -#include > - > -struct drm_i915_private; > -struct intel_crtc_state; > -struct intel_plane_state; > - > -void intel_init_clock_gating(struct drm_i915_private *dev_priv); > -void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv); > - > -#endif /* __INTEL_PM_H__ */ > diff --git a/drivers/gpu/drm/i915/vlv_suspend.c b/drivers/gpu/drm/i915/vlv_suspend.c > index 02e63ed77f60..94595dde2b96 100644 > --- a/drivers/gpu/drm/i915/vlv_suspend.c > +++ b/drivers/gpu/drm/i915/vlv_suspend.c > @@ -12,7 +12,7 @@ > #include "i915_reg.h" > #include "i915_trace.h" > #include "i915_utils.h" > -#include "intel_pm.h" > +#include "intel_clock_gating.h" > #include "vlv_suspend.h" > > #include "gt/intel_gt_regs.h" > @@ -451,7 +451,7 @@ int vlv_resume_prepare(struct drm_i915_private *dev_priv, bool rpm_resume) > vlv_check_no_gt_access(dev_priv); > > if (rpm_resume) > - intel_init_clock_gating(dev_priv); > + intel_clock_gating_init(dev_priv); > > return ret; > } > -- > 2.39.1 >