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[70.30.145.63]) by smtp.gmail.com with ESMTPSA id t62-20020ae9df41000000b0073b7f2a0bcbsm12252846qkf.36.2023.03.08.15.09.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 15:09:55 -0800 (PST) Date: Wed, 8 Mar 2023 18:09:54 -0500 From: Peter Xu To: David Woodhouse Cc: "Michael S. Tsirkin" , Paolo Bonzini , qemu-devel Subject: Re: [PATCH] hw/intc/ioapic: Update KVM routes before redelivering IRQ, on RTE update Message-ID: References: <6E7EA2EE-382C-4345-9A2A-D61E0139FB65@infradead.org> <34f494519d1921e8b62a6f3e709511a9467df54d.camel@infradead.org> <55bab93ee00619ac5b5b7416c17aee175ada8a8b.camel@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <55bab93ee00619ac5b5b7416c17aee175ada8a8b.camel@infradead.org> Received-SPF: pass client-ip=170.10.133.124; envelope-from=peterx@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, Mar 06, 2023 at 05:28:24PM +0000, David Woodhouse wrote: > Indeed, I don't think we care about the in-kernel I/OAPIC. I don't > think we care about the kernel knowing about e.g. "GSI #11" at all. We > can just deliver it as MSI (for the I/OAPIC) or using KVM_INTERRUPT and > the interrupt window as we do for the PIC. Which is why I'd happily rip > that out and let it be delivered via the APIC intercept at 0xfeexxxxx. > > The existing code which just keeps IRQ routes updated when they're > valid is kind of OK, and well-behaved guests can function. But it isn't > *right* in the case where they aren't valid. > > What *ought* to happen is that the IOMMU should raise a fault at the > moment the interrupt occurs, if the translation isn't valid. And we > don't have that at all. Right, that's definitely not ideal as an emulator. > > As for why I care? I don't really *need* it, as I have everything I > need for Xen PIRQ support already merged in > https://gitlab.com/qemu-project/qemu/-/commit/6096cf7877 > > So while the thread at > https://lore.kernel.org/qemu-devel/aaef9961d210ac1873153bf3cf01d984708744fc.camel@infradead.org/ > was partly driven by expecting to need this for Xen PIRQ support > (because in $DAYJOB I did those things in the other order and the PIRQ > support ended up just being a trivial different translator like the > IOMMU's IR)... I'd still quite like to fix it up in QEMU anyway, just > for correctness and fidelity in the faulting cases. > > We can do more efficient invalidation too, rather than blowing away the > entire routing table every time. Just disconnect the IRQFD for the > specific interrupts that get invalidated, and let them get fixed up > again next time they occur. I'm curious whether there's anything else beside the "correctness of emulation" reason. I would think it nice if it existed or trivial to have as what you said. I just don't know whether it's as easy, at least so far a new kernel interface seems still needed, allowing a kernel irq to be paused until being translated by QEMU from some channel we provide. So, IMHO it's about whether the reason that "we want to have a complete emulation of IR" can properly justify the complexity of at least the kernel interface (I don't worry on the qemu side a lot). After all, even if it can completes the emulation, 99.99% of people will not use it. :( -- Peter Xu