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From: Peter Xu <peterx@redhat.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>
Cc: qemu-devel@nongnu.org, mst@redhat.com, jasowang@redhat.com,
	pbonzini@redhat.com, richard.henderson@linaro.org,
	eduardo@habkost.net, marcel.apfelbaum@gmail.com
Subject: Re: [PATCH] intel-iommu: Set status bit after operation completed
Date: Thu, 9 Mar 2023 09:56:17 -0500	[thread overview]
Message-ID: <ZAnzkfM8QSth9bXc@x1n> (raw)
In-Reply-To: <20230309092319.29229-1-zhenzhong.duan@intel.com>

Hi, Zhenzhong,

On Thu, Mar 09, 2023 at 05:23:19PM +0800, Zhenzhong Duan wrote:
> According to SDM 11.4.4.2 Global Status Register:
> "This field is cleared by hardware when software sets the SRTP field in the
> Global Command register. This field is set by hardware when hardware
> completes the ‘Set Root Table Pointer’ operation using the value provided
> in the Root Table Address register"
> 
> Follow above spec to clear then set RTPS after finish all works, this way
> helps avoiding potential race with guest kernel. Though linux kernel is
> single threaded in writing GCMD_REG and checking GSTS_REG.
> 
> Same reasion for GSTS_REG.TES

Is this a real bug?  Or, when it'll make a difference to the guest?

Thanks,

-- 
Peter Xu



  reply	other threads:[~2023-03-09 14:57 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-09  9:23 [PATCH] intel-iommu: Set status bit after operation completed Zhenzhong Duan
2023-03-09 14:56 ` Peter Xu [this message]
2023-03-10  2:32   ` Duan, Zhenzhong
2023-03-10 14:29     ` Peter Xu
2023-03-13  3:23       ` Duan, Zhenzhong
2023-05-10  6:29 ` Michael S. Tsirkin
2023-05-10  6:36   ` Duan, Zhenzhong

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