From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: Drew Davenport <ddavenport@chromium.org>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/6] drm/i915: Disable DC states for all commits
Date: Mon, 20 Mar 2023 20:24:56 +0200 [thread overview]
Message-ID: <ZBik+B62+nlOAJaZ@intel.com> (raw)
In-Reply-To: <ZBhI2sMqrDs2sVru@ideak-desk.fi.intel.com>
On Mon, Mar 20, 2023 at 01:51:54PM +0200, Imre Deak wrote:
> On Mon, Mar 20, 2023 at 11:54:37AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > [...]
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index f86060195987..f2c9f88e7aef 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -2502,3 +2502,18 @@ intel_display_power_tbt_aux_domain(struct drm_i915_private *i915, enum aux_ch au
> >
> > return domains->aux_tbt + (int)(aux_ch - domains->aux_ch_start);
> > }
> > +
> > +void intel_display_power_assert_dc_off(struct drm_i915_private *i915)
> > +{
> > + struct i915_power_domains *power_domains = &i915->display.power.domains;
> > + struct i915_power_well *power_well;
> > +
> > + mutex_lock(&power_domains->lock);
> > +
> > + power_well = lookup_power_well(i915, SKL_DISP_DC_OFF);
> > +
> > + drm_WARN_ON(&i915->drm, power_well &&
> > + !intel_power_well_is_enabled(i915, power_well));
> > +
> > + mutex_unlock(&power_domains->lock);
>
> intel_display_power_is_enabled() returns the cached state, but I think
> it could be used here, as the hw vs. sw state is checked already at
> other places. Either way, the patch looks ok.
Yeah, intel_display_power_is_enabled() seems fine now that we use the
DC_OFF domain. I guess originally I was still using the MODESET domain
and asserting that seemed a bit too vague to my liking.
>
> > +}
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> > index 8e96be8e6330..9ca48e233185 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> > @@ -182,6 +182,7 @@ void intel_display_power_suspend(struct drm_i915_private *i915);
> > void intel_display_power_resume(struct drm_i915_private *i915);
> > void intel_display_power_set_target_dc_state(struct drm_i915_private *dev_priv,
> > u32 state);
> > +void intel_display_power_assert_dc_off(struct drm_i915_private *dev_priv);
> >
> > const char *
> > intel_display_power_domain_str(enum intel_display_power_domain domain);
> > --
> > 2.39.2
> >
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2023-03-20 18:25 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-20 9:54 [Intel-gfx] [PATCH 0/6] drm/i915: Fix various issues with noarm register writes Ville Syrjala
2023-03-20 9:54 ` [Intel-gfx] [PATCH 1/6] drm/i915: Split icl_color_commit_noarm() from skl_color_commit_noarm() Ville Syrjala
2023-03-20 9:54 ` [Intel-gfx] [PATCH 2/6] drm/i915: Move CSC load back into .color_commit_arm() when PSR is enabled on skl/glk Ville Syrjala
2023-03-20 9:54 ` [Intel-gfx] [PATCH 3/6] drm/i915: Add a .color_post_update() hook Ville Syrjala
2023-03-20 9:54 ` [Intel-gfx] [PATCH 4/6] drm/i915: Workaround ICL CSC_MODE sticky arming Ville Syrjala
2023-03-20 9:54 ` [Intel-gfx] [PATCH 5/6] drm/i915: Disable DC states for all commits Ville Syrjala
2023-03-20 11:51 ` Imre Deak
2023-03-20 18:24 ` Ville Syrjälä [this message]
2023-03-20 18:35 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-03-20 9:54 ` [Intel-gfx] [PATCH 6/6] drm/i915/psr: Define more PSR mask bits Ville Syrjala
2023-03-20 12:05 ` Imre Deak
2023-03-20 12:23 ` Ville Syrjälä
2023-03-21 20:45 ` Ville Syrjälä
2023-03-20 18:01 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Fix various issues with noarm register writes Patchwork
2023-03-20 18:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: " Patchwork
2023-03-20 18:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-20 18:02 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-20 18:23 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-03-21 6:07 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Fix various issues with noarm register writes (rev2) Patchwork
2023-03-21 6:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: " Patchwork
2023-03-21 6:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-21 6:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-21 9:59 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZBik+B62+nlOAJaZ@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=ddavenport@chromium.org \
--cc=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.