From: Imre Deak <imre.deak@intel.com>
To: Mika Kahola <mika.kahola@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 4/7] drm/i915/mtl: Add Support for C10 PHY message bus and pll programming
Date: Wed, 29 Mar 2023 18:59:03 +0300 [thread overview]
Message-ID: <ZCRgRyMK7gSEAa3B@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <ZCRb90HL81lTTIms@ideak-desk.fi.intel.com>
On Wed, Mar 29, 2023 at 06:40:39PM +0300, Imre Deak wrote:
> On Mon, Mar 27, 2023 at 03:34:30PM +0300, Mika Kahola wrote:
> [...]
> > +}
> > +
> > +static int intel_cx0_wait_for_ack(struct drm_i915_private *i915, enum port port, int lane, u32 *val)
> > +{
> > + enum phy phy = intel_port_to_phy(i915, port);
> > +
> > + if (__intel_de_wait_for_register(i915,
> > + XELPDP_PORT_P2M_MSGBUS_STATUS(port, lane - 1),
>
> As above this function should take the 0-based lane value.
Err, I meant here as earlier the function param should be
'u8 lane_mask' and use a helper to convert this mask to a lane.
--Imre
next prev parent reply other threads:[~2023-03-29 15:59 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 12:34 [Intel-gfx] [PATCH 0/7] drm/i915/mtl: Add Support for C10 chips Mika Kahola
2023-03-27 12:34 ` [Intel-gfx] [PATCH 1/7] drm/i915/mtl: Initial DDI port setup Mika Kahola
2023-03-28 11:41 ` Govindapillai, Vinod
2023-03-27 12:34 ` [Intel-gfx] [PATCH 2/7] drm/i915/mtl: Add DP rates Mika Kahola
2023-03-28 12:49 ` Govindapillai, Vinod
2023-03-27 12:34 ` [Intel-gfx] [PATCH 3/7] drm/i915/mtl: Create separate reg file for PICA registers Mika Kahola
2023-03-28 15:33 ` Govindapillai, Vinod
2023-03-27 12:34 ` [Intel-gfx] [PATCH 4/7] drm/i915/mtl: Add Support for C10 PHY message bus and pll programming Mika Kahola
2023-03-29 10:22 ` Govindapillai, Vinod
2023-03-29 15:40 ` Imre Deak
2023-03-29 15:59 ` Imre Deak [this message]
2023-04-04 10:43 ` Kahola, Mika
2023-04-04 11:47 ` Imre Deak
2023-04-04 13:01 ` Kahola, Mika
2023-04-04 13:27 ` Imre Deak
2023-04-04 16:50 ` Sripada, Radhakrishna
2023-04-04 18:03 ` Imre Deak
2023-04-04 19:22 ` Sripada, Radhakrishna
2023-04-04 21:28 ` Imre Deak
2023-04-03 10:11 ` Imre Deak
2023-04-03 10:19 ` Kahola, Mika
2023-04-03 10:36 ` Imre Deak
2023-04-03 10:43 ` Kahola, Mika
2023-03-27 12:34 ` [Intel-gfx] [PATCH 5/7] drm/i915/mtl: Add C10 phy programming for HDMI Mika Kahola
2023-04-03 10:26 ` Imre Deak
2023-03-27 12:34 ` [Intel-gfx] [PATCH 6/7] drm/i915/mtl: Add vswing programming for C10 phys Mika Kahola
2023-04-03 11:18 ` Imre Deak
2023-03-27 12:34 ` [Intel-gfx] [PATCH 7/7] drm/i915/mtl: Add support for PM DEMAND Mika Kahola
2023-03-27 19:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Add Support for C10 chips Patchwork
2023-03-27 19:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-27 19:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-28 1:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-03-29 16:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Add Support for C10 chips (rev2) Patchwork
2023-03-29 16:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-29 16:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-30 8:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-04-05 8:52 ` [Intel-gfx] [PATCH 0/7] drm/i915/mtl: Add Support for C10 chips Andi Shyti
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